1 /* 2 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <bl_common.h> 8 #include <console.h> 9 #include <debug.h> 10 #include <plat_arm.h> 11 #include <platform_tsp.h> 12 #include "../zynqmp_private.h" 13 14 #define BL32_END (unsigned long)(&__BL32_END__) 15 16 /******************************************************************************* 17 * Initialize the UART 18 ******************************************************************************/ 19 void tsp_early_platform_setup(void) 20 { 21 /* 22 * Initialize a different console than already in use to display 23 * messages from TSP 24 */ 25 console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(), 26 ZYNQMP_UART_BAUDRATE); 27 28 /* Initialize the platform config for future decision making */ 29 zynqmp_config_setup(); 30 } 31 32 /******************************************************************************* 33 * Perform platform specific setup placeholder 34 ******************************************************************************/ 35 void tsp_platform_setup(void) 36 { 37 plat_arm_gic_driver_init(); 38 plat_arm_gic_init(); 39 } 40 41 /******************************************************************************* 42 * Perform the very early platform specific architectural setup here. At the 43 * moment this is only intializes the MMU 44 ******************************************************************************/ 45 void tsp_plat_arch_setup(void) 46 { 47 arm_setup_page_tables(BL32_BASE, 48 BL32_END - BL32_BASE, 49 BL_CODE_BASE, 50 BL_CODE_END, 51 BL_RO_DATA_BASE, 52 BL_RO_DATA_END, 53 BL_COHERENT_RAM_BASE, 54 BL_COHERENT_RAM_END 55 ); 56 enable_mmu_el1(0); 57 } 58
