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      1 /** @file
      2 *
      3 *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
      4 *
      5 *  This program and the accompanying materials
      6 *  are licensed and made available under the terms and conditions of the BSD License
      7 *  which accompanies this distribution.  The full text of the license may be found at
      8 *  http://opensource.org/licenses/bsd-license.php
      9 *
     10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     12 *
     13 **/
     14 
     15 #include <Library/IoLib.h>
     16 #include <Library/ArmGicLib.h>
     17 #include <Library/ArmPlatformLib.h>
     18 #include <Library/DebugLib.h>
     19 #include <Library/PcdLib.h>
     20 
     21 #include <Drivers/PL310L2Cache.h>
     22 #include <Drivers/SP804Timer.h>
     23 
     24 #include <ArmPlatform.h>
     25 
     26 // Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet
     27 VOID
     28 InitializeGicV3 (
     29   VOID
     30   );
     31 
     32 /**
     33   Initialize the Secure peripherals and memory regions
     34 
     35   If Trustzone is supported by your platform then this function makes the required initialization
     36   of the secure peripherals and memory regions.
     37 
     38 **/
     39 VOID
     40 ArmPlatformSecTrustzoneInit (
     41   IN  UINTN                     MpId
     42   )
     43 {
     44   // No TZPC or TZASC on RTSM to initialize
     45 }
     46 
     47 /**
     48   Initialize controllers that must setup at the early stage
     49 
     50   Some peripherals must be initialized in Secure World.
     51   For example, some L2x0 requires to be initialized in Secure World
     52 
     53 **/
     54 RETURN_STATUS
     55 ArmPlatformSecInitialize (
     56   IN  UINTN                     MpId
     57   )
     58 {
     59   UINT32  Identification;
     60 
     61   // If it is not the primary core then there is nothing to do
     62   if (!ArmPlatformIsPrimaryCore (MpId)) {
     63     return RETURN_SUCCESS;
     64   }
     65 
     66   // Configure periodic timer (TIMER0) for 1MHz operation
     67   MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
     68   // Configure 1MHz clock
     69   MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
     70   // Configure SP810 to use 1MHz clock and disable
     71   MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
     72   // Configure SP810 to use 1MHz clock and disable
     73   MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
     74 
     75   // Read the GIC Identification Register
     76   Identification = ArmGicGetInterfaceIdentification (PcdGet64 (PcdGicInterruptInterfaceBase));
     77 
     78   // Check if we are GICv3
     79   if (ARM_GIC_ICCIIDR_GET_ARCH_VERSION(Identification) >= 0x3) {
     80     InitializeGicV3 ();
     81   }
     82 
     83   return RETURN_SUCCESS;
     84 }
     85 
     86 /**
     87   Call before jumping to Normal World
     88 
     89   This function allows the firmware platform to do extra actions before
     90   jumping to the Normal World
     91 
     92 **/
     93 VOID
     94 ArmPlatformSecExtraAction (
     95   IN  UINTN         MpId,
     96   OUT UINTN*        JumpAddress
     97   )
     98 {
     99   *JumpAddress = PcdGet64 (PcdFvBaseAddress);
    100 }
    101