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      1 /** @file
      2   PCI bus enumeration logic function declaration for PCI bus module.
      3 
      4 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
      5 This program and the accompanying materials
      6 are licensed and made available under the terms and conditions of the BSD License
      7 which accompanies this distribution.  The full text of the license may be found at
      8 http://opensource.org/licenses/bsd-license.php
      9 
     10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     12 
     13 **/
     14 
     15 #ifndef _EFI_PCI_ENUMERATOR_H_
     16 #define _EFI_PCI_ENUMERATOR_H_
     17 
     18 #include "PciResourceSupport.h"
     19 
     20 /**
     21   This routine is used to enumerate entire pci bus system
     22   in a given platform.
     23 
     24   @param Controller  Parent controller handle.
     25 
     26   @retval EFI_SUCCESS    PCI enumeration finished successfully.
     27   @retval other          Some error occurred when enumerating the pci bus system.
     28 
     29 **/
     30 EFI_STATUS
     31 PciEnumerator (
     32   IN EFI_HANDLE                    Controller
     33   );
     34 
     35 /**
     36   Enumerate PCI root bridge.
     37 
     38   @param PciResAlloc   Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
     39   @param RootBridgeDev Instance of root bridge device.
     40 
     41   @retval EFI_SUCCESS  Successfully enumerated root bridge.
     42   @retval other        Failed to enumerate root bridge.
     43 
     44 **/
     45 EFI_STATUS
     46 PciRootBridgeEnumerator (
     47   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc,
     48   IN PCI_IO_DEVICE                                     *RootBridgeDev
     49   );
     50 
     51 /**
     52   This routine is used to process all PCI devices' Option Rom
     53   on a certain root bridge.
     54 
     55   @param Bridge     Given parent's root bridge.
     56   @param RomBase    Base address of ROM driver loaded from.
     57   @param MaxLength  Maximum rom size.
     58 
     59 **/
     60 VOID
     61 ProcessOptionRom (
     62   IN PCI_IO_DEVICE *Bridge,
     63   IN UINT64        RomBase,
     64   IN UINT64        MaxLength
     65   );
     66 
     67 /**
     68   This routine is used to assign bus number to the given PCI bus system
     69 
     70   @param Bridge             Parent root bridge instance.
     71   @param StartBusNumber     Number of beginning.
     72   @param SubBusNumber       The number of sub bus.
     73 
     74   @retval EFI_SUCCESS       Successfully assigned bus number.
     75   @retval EFI_DEVICE_ERROR  Failed to assign bus number.
     76 
     77 **/
     78 EFI_STATUS
     79 PciAssignBusNumber (
     80   IN PCI_IO_DEVICE                      *Bridge,
     81   IN UINT8                              StartBusNumber,
     82   OUT UINT8                             *SubBusNumber
     83   );
     84 
     85 /**
     86   This routine is used to determine the root bridge attribute by interfacing
     87   the host bridge resource allocation protocol.
     88 
     89   @param PciResAlloc    Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
     90   @param RootBridgeDev  Root bridge instance
     91 
     92   @retval EFI_SUCCESS  Successfully got root bridge's attribute.
     93   @retval other        Failed to get attribute.
     94 
     95 **/
     96 EFI_STATUS
     97 DetermineRootBridgeAttributes (
     98   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
     99   IN PCI_IO_DEVICE                                    *RootBridgeDev
    100   );
    101 
    102 /**
    103   Get Max Option Rom size on specified bridge.
    104 
    105   @param Bridge    Given bridge device instance.
    106 
    107   @return Max size of option rom needed.
    108 
    109 **/
    110 UINT64
    111 GetMaxOptionRomSize (
    112   IN PCI_IO_DEVICE   *Bridge
    113   );
    114 
    115 /**
    116   Process attributes of devices on this host bridge
    117 
    118   @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
    119 
    120   @retval EFI_SUCCESS   Successfully process attribute.
    121   @retval EFI_NOT_FOUND Can not find the specific root bridge device.
    122   @retval other         Failed to determine the root bridge device's attribute.
    123 
    124 **/
    125 EFI_STATUS
    126 PciHostBridgeDeviceAttribute (
    127   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
    128   );
    129 
    130 /**
    131   Get resource allocation status from the ACPI resource descriptor.
    132 
    133   @param AcpiConfig       Point to Acpi configuration table.
    134   @param IoResStatus      Return the status of I/O resource.
    135   @param Mem32ResStatus   Return the status of 32-bit Memory resource.
    136   @param PMem32ResStatus  Return the status of 32-bit Prefetchable Memory resource.
    137   @param Mem64ResStatus   Return the status of 64-bit Memory resource.
    138   @param PMem64ResStatus  Return the status of 64-bit Prefetchable Memory resource.
    139 
    140 **/
    141 VOID
    142 GetResourceAllocationStatus (
    143   VOID        *AcpiConfig,
    144   OUT UINT64  *IoResStatus,
    145   OUT UINT64  *Mem32ResStatus,
    146   OUT UINT64  *PMem32ResStatus,
    147   OUT UINT64  *Mem64ResStatus,
    148   OUT UINT64  *PMem64ResStatus
    149   );
    150 
    151 /**
    152   Remove a PCI device from device pool and mark its bar.
    153 
    154   @param PciDevice Instance of Pci device.
    155 
    156   @retval EFI_SUCCESS Successfully remove the PCI device.
    157   @retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.
    158 
    159 **/
    160 EFI_STATUS
    161 RejectPciDevice (
    162   IN PCI_IO_DEVICE       *PciDevice
    163   );
    164 
    165 /**
    166   Determine whethter a PCI device can be rejected.
    167 
    168   @param  PciResNode Pointer to Pci resource node instance.
    169 
    170   @retval TRUE  The PCI device can be rejected.
    171   @retval TRUE  The PCI device cannot be rejected.
    172 
    173 **/
    174 BOOLEAN
    175 IsRejectiveDevice (
    176   IN  PCI_RESOURCE_NODE   *PciResNode
    177   );
    178 
    179 /**
    180   Compare two resource nodes and get the larger resource consumer.
    181 
    182   @param PciResNode1  resource node 1 want to be compared
    183   @param PciResNode2  resource node 2 want to be compared
    184 
    185   @return Larger resource node.
    186 
    187 **/
    188 PCI_RESOURCE_NODE *
    189 GetLargerConsumerDevice (
    190   IN  PCI_RESOURCE_NODE   *PciResNode1,
    191   IN  PCI_RESOURCE_NODE   *PciResNode2
    192   );
    193 
    194 /**
    195   Get the max resource consumer in the host resource pool.
    196 
    197   @param ResPool  Pointer to resource pool node.
    198 
    199   @return The max resource consumer in the host resource pool.
    200 
    201 **/
    202 PCI_RESOURCE_NODE *
    203 GetMaxResourceConsumerDevice (
    204   IN  PCI_RESOURCE_NODE   *ResPool
    205   );
    206 
    207 /**
    208   Adjust host bridge allocation so as to reduce resource requirement
    209 
    210   @param IoPool           Pointer to instance of I/O resource Node.
    211   @param Mem32Pool        Pointer to instance of 32-bit memory resource Node.
    212   @param PMem32Pool       Pointer to instance of 32-bit Prefetchable memory resource node.
    213   @param Mem64Pool        Pointer to instance of 64-bit memory resource node.
    214   @param PMem64Pool       Pointer to instance of 64-bit Prefetchable memory resource node.
    215   @param IoResStatus      Status of I/O resource Node.
    216   @param Mem32ResStatus   Status of 32-bit memory resource Node.
    217   @param PMem32ResStatus  Status of 32-bit Prefetchable memory resource node.
    218   @param Mem64ResStatus   Status of 64-bit memory resource node.
    219   @param PMem64ResStatus  Status of 64-bit Prefetchable memory resource node.
    220 
    221   @retval EFI_SUCCESS     Successfully adjusted resource on host bridge.
    222   @retval EFI_ABORTED     Host bridge hasn't this resource type or no resource be adjusted.
    223 
    224 **/
    225 EFI_STATUS
    226 PciHostBridgeAdjustAllocation (
    227   IN  PCI_RESOURCE_NODE   *IoPool,
    228   IN  PCI_RESOURCE_NODE   *Mem32Pool,
    229   IN  PCI_RESOURCE_NODE   *PMem32Pool,
    230   IN  PCI_RESOURCE_NODE   *Mem64Pool,
    231   IN  PCI_RESOURCE_NODE   *PMem64Pool,
    232   IN  UINT64              IoResStatus,
    233   IN  UINT64              Mem32ResStatus,
    234   IN  UINT64              PMem32ResStatus,
    235   IN  UINT64              Mem64ResStatus,
    236   IN  UINT64              PMem64ResStatus
    237   );
    238 
    239 /**
    240   Summary requests for all resource type, and construct ACPI resource
    241   requestor instance.
    242 
    243   @param Bridge           detecting bridge
    244   @param IoNode           Pointer to instance of I/O resource Node
    245   @param Mem32Node        Pointer to instance of 32-bit memory resource Node
    246   @param PMem32Node       Pointer to instance of 32-bit Pmemory resource node
    247   @param Mem64Node        Pointer to instance of 64-bit memory resource node
    248   @param PMem64Node       Pointer to instance of 64-bit Pmemory resource node
    249   @param Config           Output buffer holding new constructed APCI resource requestor
    250 
    251   @retval EFI_SUCCESS           Successfully constructed ACPI resource.
    252   @retval EFI_OUT_OF_RESOURCES  No memory available.
    253 
    254 **/
    255 EFI_STATUS
    256 ConstructAcpiResourceRequestor (
    257   IN PCI_IO_DEVICE      *Bridge,
    258   IN PCI_RESOURCE_NODE  *IoNode,
    259   IN PCI_RESOURCE_NODE  *Mem32Node,
    260   IN PCI_RESOURCE_NODE  *PMem32Node,
    261   IN PCI_RESOURCE_NODE  *Mem64Node,
    262   IN PCI_RESOURCE_NODE  *PMem64Node,
    263   OUT VOID              **Config
    264   );
    265 
    266 /**
    267   Get resource base from an acpi configuration descriptor.
    268 
    269   @param Config       An acpi configuration descriptor.
    270   @param IoBase       Output of I/O resource base address.
    271   @param Mem32Base    Output of 32-bit memory base address.
    272   @param PMem32Base   Output of 32-bit prefetchable memory base address.
    273   @param Mem64Base    Output of 64-bit memory base address.
    274   @param PMem64Base   Output of 64-bit prefetchable memory base address.
    275 
    276 **/
    277 VOID
    278 GetResourceBase (
    279   IN VOID     *Config,
    280   OUT UINT64  *IoBase,
    281   OUT UINT64  *Mem32Base,
    282   OUT UINT64  *PMem32Base,
    283   OUT UINT64  *Mem64Base,
    284   OUT UINT64  *PMem64Base
    285   );
    286 
    287 /**
    288   Enumerate pci bridge, allocate resource and determine attribute
    289   for devices on this bridge.
    290 
    291   @param BridgeDev    Pointer to instance of bridge device.
    292 
    293   @retval EFI_SUCCESS Successfully enumerated PCI bridge.
    294   @retval other       Failed to enumerate.
    295 
    296 **/
    297 EFI_STATUS
    298 PciBridgeEnumerator (
    299   IN PCI_IO_DEVICE                                     *BridgeDev
    300   );
    301 
    302 /**
    303   Allocate all kinds of resource for PCI bridge.
    304 
    305   @param  Bridge      Pointer to bridge instance.
    306 
    307   @retval EFI_SUCCESS Successfully allocated resource for PCI bridge.
    308   @retval other       Failed to allocate resource for bridge.
    309 
    310 **/
    311 EFI_STATUS
    312 PciBridgeResourceAllocator (
    313   IN PCI_IO_DEVICE  *Bridge
    314   );
    315 
    316 /**
    317   Get resource base address for a pci bridge device.
    318 
    319   @param Bridge     Given Pci driver instance.
    320   @param IoBase     Output for base address of I/O type resource.
    321   @param Mem32Base  Output for base address of 32-bit memory type resource.
    322   @param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.
    323   @param Mem64Base  Output for base address of 64-bit memory type resource.
    324   @param PMem64Base Output for base address of 64-bit Pmemory type resource.
    325 
    326   @retval EFI_SUCCESS           Successfully got resource base address.
    327   @retval EFI_OUT_OF_RESOURCES  PCI bridge is not available.
    328 
    329 **/
    330 EFI_STATUS
    331 GetResourceBaseFromBridge (
    332   IN  PCI_IO_DEVICE *Bridge,
    333   OUT UINT64        *IoBase,
    334   OUT UINT64        *Mem32Base,
    335   OUT UINT64        *PMem32Base,
    336   OUT UINT64        *Mem64Base,
    337   OUT UINT64        *PMem64Base
    338   );
    339 
    340 /**
    341   Process Option Rom on this host bridge
    342 
    343   @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
    344 
    345   @retval EFI_NOT_FOUND Can not find the root bridge instance.
    346   @retval EFI_SUCCESS   Success process.
    347 **/
    348 EFI_STATUS
    349 PciHostBridgeP2CProcess (
    350   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
    351   );
    352 
    353 /**
    354    These are the notifications from the PCI bus driver that it is about to enter a certain
    355    phase of the PCI enumeration process.
    356 
    357    This member function can be used to notify the host bridge driver to perform specific actions,
    358    including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
    359    Eight notification points are defined at this time. See belows:
    360    EfiPciHostBridgeBeginEnumeration       Resets the host bridge PCI apertures and internal data
    361                                           structures. The PCI enumerator should issue this notification
    362                                           before starting a fresh enumeration process. Enumeration cannot
    363                                           be restarted after sending any other notification such as
    364                                           EfiPciHostBridgeBeginBusAllocation.
    365    EfiPciHostBridgeBeginBusAllocation     The bus allocation phase is about to begin. No specific action is
    366                                           required here. This notification can be used to perform any
    367                                           chipset-specific programming.
    368    EfiPciHostBridgeEndBusAllocation       The bus allocation and bus programming phase is complete. No
    369                                           specific action is required here. This notification can be used to
    370                                           perform any chipset-specific programming.
    371    EfiPciHostBridgeBeginResourceAllocation
    372                                           The resource allocation phase is about to begin. No specific
    373                                           action is required here. This notification can be used to perform
    374                                           any chipset-specific programming.
    375    EfiPciHostBridgeAllocateResources      Allocates resources per previously submitted requests for all the PCI
    376                                           root bridges. These resource settings are returned on the next call to
    377                                           GetProposedResources(). Before calling NotifyPhase() with a Phase of
    378                                           EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
    379                                           for gathering I/O and memory requests for
    380                                           all the PCI root bridges and submitting these requests using
    381                                           SubmitResources(). This function pads the resource amount
    382                                           to suit the root bridge hardware, takes care of dependencies between
    383                                           the PCI root bridges, and calls the Global Coherency Domain (GCD)
    384                                           with the allocation request. In the case of padding, the allocated range
    385                                           could be bigger than what was requested.
    386    EfiPciHostBridgeSetResources           Programs the host bridge hardware to decode previously allocated
    387                                           resources (proposed resources) for all the PCI root bridges. After the
    388                                           hardware is programmed, reassigning resources will not be supported.
    389                                           The bus settings are not affected.
    390    EfiPciHostBridgeFreeResources          Deallocates resources that were previously allocated for all the PCI
    391                                           root bridges and resets the I/O and memory apertures to their initial
    392                                           state. The bus settings are not affected. If the request to allocate
    393                                           resources fails, the PCI enumerator can use this notification to
    394                                           deallocate previous resources, adjust the requests, and retry
    395                                           allocation.
    396    EfiPciHostBridgeEndResourceAllocation  The resource allocation phase is completed. No specific action is
    397                                           required here. This notification can be used to perform any chipsetspecific
    398                                           programming.
    399 
    400    @param[in] PciResAlloc         The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
    401    @param[in] Phase               The phase during enumeration
    402 
    403    @retval EFI_NOT_READY          This phase cannot be entered at this time. For example, this error
    404                                   is valid for a Phase of EfiPciHostBridgeAllocateResources if
    405                                   SubmitResources() has not been called for one or more
    406                                   PCI root bridges before this call
    407    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error. This error is valid
    408                                   for a Phase of EfiPciHostBridgeSetResources.
    409    @retval EFI_INVALID_PARAMETER  Invalid phase parameter
    410    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
    411                                   This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
    412                                   previously submitted resource requests cannot be fulfilled or
    413                                   were only partially fulfilled.
    414    @retval EFI_SUCCESS            The notification was accepted without any errors.
    415 
    416 **/
    417 EFI_STATUS
    418 NotifyPhase (
    419   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
    420   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE       Phase
    421   );
    422 
    423 /**
    424   Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
    425   stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
    426   PCI controllers before enumeration.
    427 
    428   This function is called during the PCI enumeration process. No specific action is expected from this
    429   member function. It allows the host bridge driver to preinitialize individual PCI controllers before
    430   enumeration.
    431 
    432   @param Bridge            Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
    433   @param Bus               The bus number of the pci device.
    434   @param Device            The device number of the pci device.
    435   @param Func              The function number of the pci device.
    436   @param Phase             The phase of the PCI device enumeration.
    437 
    438   @retval EFI_SUCCESS              The requested parameters were returned.
    439   @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge handle.
    440   @retval EFI_INVALID_PARAMETER    Phase is not a valid phase that is defined in
    441                                    EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
    442   @retval EFI_DEVICE_ERROR         Programming failed due to a hardware error. The PCI enumerator should
    443                                     not enumerate this device, including its child devices if it is a PCI-to-PCI
    444                                     bridge.
    445 
    446 **/
    447 EFI_STATUS
    448 PreprocessController (
    449   IN PCI_IO_DEVICE                                  *Bridge,
    450   IN UINT8                                          Bus,
    451   IN UINT8                                          Device,
    452   IN UINT8                                          Func,
    453   IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE   Phase
    454   );
    455 
    456 /**
    457   This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has
    458   happened on the hot-plug controller. Currently, the operations include add operation and remove operation..
    459 
    460   @param This                 A pointer to the hot plug request protocol.
    461   @param Operation            The operation the PCI bus driver is requested to make.
    462   @param Controller           The handle of the hot-plug controller.
    463   @param RemainingDevicePath  The remaining device path for the PCI-like hot-plug device.
    464   @param NumberOfChildren     The number of child handles.
    465                               For a add operation, it is an output parameter.
    466                               For a remove operation, it's an input parameter.
    467   @param ChildHandleBuffer    The buffer which contains the child handles.
    468 
    469   @retval EFI_INVALID_PARAMETER  Operation is not a legal value.
    470                                  Controller is NULL or not a valid handle.
    471                                  NumberOfChildren is NULL.
    472                                  ChildHandleBuffer is NULL while Operation is add.
    473   @retval EFI_OUT_OF_RESOURCES   There are no enough resources to start the devices.
    474   @retval EFI_NOT_FOUND          Can not find bridge according to controller handle.
    475   @retval EFI_SUCCESS            The handles for the specified device have been created or destroyed
    476                                  as requested, and for an add operation, the new handles are
    477                                  returned in ChildHandleBuffer.
    478 **/
    479 EFI_STATUS
    480 EFIAPI
    481 PciHotPlugRequestNotify (
    482   IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL * This,
    483   IN EFI_PCI_HOTPLUG_OPERATION        Operation,
    484   IN EFI_HANDLE                       Controller,
    485   IN EFI_DEVICE_PATH_PROTOCOL         * RemainingDevicePath OPTIONAL,
    486   IN OUT UINT8                        *NumberOfChildren,
    487   IN OUT EFI_HANDLE                   * ChildHandleBuffer
    488   );
    489 
    490 /**
    491   Search hostbridge according to given handle
    492 
    493   @param RootBridgeHandle  Host bridge handle.
    494 
    495   @retval TRUE             Found host bridge handle.
    496   @retval FALSE            Not found hot bridge handle.
    497 
    498 **/
    499 BOOLEAN
    500 SearchHostBridgeHandle (
    501   IN EFI_HANDLE RootBridgeHandle
    502   );
    503 
    504 /**
    505   Add host bridge handle to global variable for enumerating.
    506 
    507   @param HostBridgeHandle   Host bridge handle.
    508 
    509   @retval EFI_SUCCESS       Successfully added host bridge.
    510   @retval EFI_ABORTED       Host bridge is NULL, or given host bridge
    511                             has been in host bridge list.
    512 
    513 **/
    514 EFI_STATUS
    515 AddHostBridgeEnumerator (
    516   IN EFI_HANDLE HostBridgeHandle
    517   );
    518 
    519 #endif
    520