1 /** @file 2 EFI SMM Control PPI definition. 3 4 This PPI is used to initiate SMI/PMI activations. This protocol could be published by either: 5 - A processor driver to abstract the SMI/PMI IPI 6 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an 7 Intel chipset 8 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this 9 event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based 10 systems. 11 12 Copyright (c) 2010, Intel Corporation. All rights reserved.<BR> 13 14 This program and the accompanying materials 15 are licensed and made available under the terms and conditions 16 of the BSD License which accompanies this distribution. The 17 full text of the license may be found at 18 http://opensource.org/licenses/bsd-license.php 19 20 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 21 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 22 23 **/ 24 25 26 #ifndef _SMM_CONTROL_PPI_H_ 27 #define _SMM_CONTROL_PPI_H_ 28 29 #define PEI_SMM_CONTROL_PPI_GUID \ 30 { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 } 31 32 typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI; 33 34 /** 35 Invokes SMI activation from either the preboot or runtime environment. 36 37 @param PeiServices General purpose services available to every PEIM. 38 @param This The PEI_SMM_CONTROL_PPI instance. 39 @param ArgumentBuffer The optional sized data to pass into the protocol activation. 40 @param ArgumentBufferSize The optional size of the data. 41 @param Periodic An optional mechanism to periodically repeat activation. 42 @param ActivationInterval An optional parameter to repeat at this period one 43 time or, if the Periodic Boolean is set, periodically. 44 45 @retval EFI_SUCCESS The SMI/PMI has been engendered. 46 @retval EFI_DEVICE_ERROR The timing is unsupported. 47 @retval EFI_INVALID_PARAMETER The activation period is unsupported. 48 @retval EFI_NOT_STARTED The SMM base service has not been initialized. 49 50 **/ 51 typedef 52 EFI_STATUS 53 (EFIAPI *PEI_SMM_ACTIVATE) ( 54 IN EFI_PEI_SERVICES **PeiServices, 55 IN PEI_SMM_CONTROL_PPI * This, 56 IN OUT INT8 *ArgumentBuffer OPTIONAL, 57 IN OUT UINTN *ArgumentBufferSize OPTIONAL, 58 IN BOOLEAN Periodic OPTIONAL, 59 IN UINTN ActivationInterval OPTIONAL 60 ); 61 62 /** 63 Clears any system state that was created in response to the Active call. 64 65 @param PeiServices General purpose services available to every PEIM. 66 @param This The PEI_SMM_CONTROL_PPI instance. 67 @param Periodic Optional parameter to repeat at this period one 68 time or, if the Periodic Boolean is set, periodically. 69 70 @retval EFI_SUCCESS The SMI/PMI has been engendered. 71 @retval EFI_DEVICE_ERROR The source could not be cleared. 72 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument. 73 74 **/ 75 typedef 76 EFI_STATUS 77 (EFIAPI *PEI_SMM_DEACTIVATE) ( 78 IN EFI_PEI_SERVICES **PeiServices, 79 IN PEI_SMM_CONTROL_PPI * This, 80 IN BOOLEAN Periodic OPTIONAL 81 ); 82 83 /// 84 /// PEI SMM Control PPI is used to initiate SMI/PMI activations. This protocol could be published by either: 85 /// - A processor driver to abstract the SMI/PMI IPI 86 /// - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an 87 /// Intel chipset 88 /// 89 struct _PEI_SMM_CONTROL_PPI { 90 PEI_SMM_ACTIVATE Trigger; 91 PEI_SMM_DEACTIVATE Clear; 92 }; 93 94 extern EFI_GUID gPeiSmmControlPpiGuid; 95 96 #endif 97
