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      1 /** @file
      2   This file declares Sec Platform Information PPI.
      3 
      4   This service is the primary handoff state into the PEI Foundation.
      5   The Security (SEC) component creates the early, transitory memory
      6   environment and also encapsulates knowledge of at least the
      7   location of the Boot Firmware Volume (BFV).
      8 
      9 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
     10 This program and the accompanying materials are licensed and made available under
     11 the terms and conditions of the BSD License that accompanies this distribution.
     12 The full text of the license may be found at
     13 http://opensource.org/licenses/bsd-license.php.
     14 
     15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     17 
     18   @par Revision Reference:
     19   This PPI is introduced in PI Version 1.0.
     20 
     21 **/
     22 
     23 #ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
     24 #define __SEC_PLATFORM_INFORMATION_PPI_H__
     25 
     26 #include <Pi/PiPeiCis.h>
     27 
     28 #define EFI_SEC_PLATFORM_INFORMATION_GUID \
     29   { \
     30     0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
     31   }
     32 
     33 typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
     34 
     35 
     36 ///
     37 /// EFI_HEALTH_FLAGS
     38 /// Contains information generated by microcode, hardware, and/or the Itanium
     39 /// processor PAL code about the state of the processor upon reset.
     40 ///
     41 typedef union {
     42   struct {
     43     ///
     44     /// A 2-bit field indicating self-test state after reset.
     45     ///
     46     UINT32   Status                   : 2;
     47     ///
     48     /// A 1-bit field indicating whether testing has occurred.
     49     /// If this field is zero, the processor has not been tested,
     50     /// and no further fields in the self-test State parameter are valid.
     51     ///
     52     UINT32   Tested                   : 1;
     53     ///
     54     /// Reserved 13 bits.
     55     ///
     56     UINT32   Reserved1                :13;
     57     ///
     58     /// A 1-bit field. If set to 1, this indicates that virtual
     59     /// memory features are not available.
     60     ///
     61     UINT32   VirtualMemoryUnavailable : 1;
     62     ///
     63     /// A 1-bit field. If set to 1, this indicates that IA-32 execution
     64     /// is not available.
     65     ///
     66     UINT32   Ia32ExecutionUnavailable : 1;
     67     ///
     68     /// A 1-bit field. If set to 1, this indicates that the floating
     69     /// point unit is not available.
     70     ///
     71     UINT32   FloatingPointUnavailable : 1;
     72     ///
     73     /// A 1-bit field. If set to 1, this indicates miscellaneous
     74     /// functional failure other than vm, ia, or fp.
     75     /// The test status field provides additional information on
     76     /// test failures when the State field returns a value of
     77     /// performance restricted or functionally restricted.
     78     /// The value returned is implementation dependent.
     79     ///
     80     UINT32   MiscFeaturesUnavailable  : 1;
     81     ///
     82     /// Reserved 12 bits.
     83     ///
     84     UINT32   Reserved2                :12;
     85   } Bits;
     86   UINT32     Uint32;
     87 } EFI_HEALTH_FLAGS;
     88 
     89 #define NORMAL_BOOT_CALL    0x0
     90 #define RECOVERY_CHECK_CALL 0x3
     91 
     92 typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;
     93 typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;
     94 ///
     95 /// The hand-off status structure for Itanium architecture.
     96 ///
     97 typedef struct {
     98   ///
     99   /// SALE_ENTRY state : 3 = Recovery_Check
    100   /// and 0 = RESET or Normal_Boot phase.
    101   ///
    102   UINT8 BootPhase;
    103   ///
    104   /// Firmware status on entry to SALE.
    105   ///
    106   UINT8 FWStatus;
    107   UINT16 Reserved1;
    108   UINT32 Reserved2;
    109   ///
    110   /// Geographically significant unique processor ID assigned by PAL.
    111   ///
    112   UINT16 ProcId;
    113   UINT16 Reserved3;
    114   UINT8  IdMask;
    115   UINT8  EidMask;
    116   UINT16 Reserved4;
    117   ///
    118   /// Address to make PAL calls.
    119   ///
    120   UINT64 PalCallAddress;
    121   ///
    122   /// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET
    123   /// return address, and if entry state is RESET, this contains
    124   /// address for PAL_authentication call.
    125   ///
    126   UINT64 PalSpecialAddress;
    127   ///
    128   /// GR35 from PALE_EXIT state.
    129   ///
    130   UINT64 SelfTestStatus;
    131   ///
    132   /// GR37 from PALE_EXIT state.
    133   ///
    134   UINT64 SelfTestControl;
    135   UINT64 MemoryBufferRequired;
    136 } ITANIUM_HANDOFF_STATUS;
    137 
    138 ///
    139 /// EFI_SEC_PLATFORM_INFORMATION_RECORD.
    140 ///
    141 typedef union {
    142   IA32_HANDOFF_STATUS    IA32HealthFlags;
    143   X64_HANDOFF_STATUS     x64HealthFlags;
    144   ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;
    145 } EFI_SEC_PLATFORM_INFORMATION_RECORD;
    146 
    147 /**
    148   This interface conveys state information out of the Security (SEC) phase into PEI.
    149 
    150   This service is published by the SEC phase. The SEC phase handoff has an optional
    151   EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
    152   PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel
    153   architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated
    154   into the data structure abstracted by this service. This information is collected for the boot-strap
    155   processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute
    156   the PEI Foundation.
    157 
    158   @param  PeiServices               The pointer to the PEI Services Table.
    159   @param  StructureSize             The pointer to the variable describing size of the input buffer.
    160   @param  PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
    161 
    162   @retval EFI_SUCCESS               The data was successfully returned.
    163   @retval EFI_BUFFER_TOO_SMALL      The buffer was too small. The current buffer size needed to
    164                                     hold the record is returned in StructureSize.
    165 
    166 **/
    167 typedef
    168 EFI_STATUS
    169 (EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(
    170   IN CONST  EFI_PEI_SERVICES                    **PeiServices,
    171   IN OUT    UINT64                              *StructureSize,
    172   OUT       EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
    173 );
    174 
    175 
    176 ///
    177 /// This service abstracts platform-specific information. It is necessary
    178 /// to convey this information to the PEI Foundation so that it can
    179 /// discover where to begin dispatching PEIMs.
    180 ///
    181 struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
    182   EFI_SEC_PLATFORM_INFORMATION  PlatformInformation;
    183 };
    184 
    185 
    186 extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
    187 
    188 #endif
    189