1 ## @file 2 # EFI/Framework Open Virtual Machine Firmware (OVMF) platform 3 # 4 # Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR> 5 # 6 # This program and the accompanying materials 7 # are licensed and made available under the terms and conditions of the BSD License 8 # which accompanies this distribution. The full text of the license may be found at 9 # http://opensource.org/licenses/bsd-license.php 10 # 11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 # 14 ## 15 16 [Defines] 17 DEC_SPECIFICATION = 0x00010005 18 PACKAGE_NAME = OvmfPkg 19 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5 20 PACKAGE_VERSION = 0.1 21 22 [Includes] 23 Include 24 25 [LibraryClasses] 26 ## @libraryclass Loads and boots a Linux kernel image 27 # 28 LoadLinuxLib|Include/Library/LoadLinuxLib.h 29 30 ## @libraryclass Save and restore variables using a file 31 # 32 NvVarsFileLib|Include/Library/NvVarsFileLib.h 33 34 ## @libraryclass Access QEMU's firmware configuration interface 35 # 36 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h 37 38 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder" 39 # fw_cfg file. 40 # 41 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h 42 43 ## @libraryclass Serialize (and deserialize) variables 44 # 45 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h 46 47 ## @libraryclass Invoke Xen hypercalls 48 # 49 XenHypercallLib|Include/Library/XenHypercallLib.h 50 51 ## @libraryclass Manage XenBus device path and I/O handles 52 # 53 XenIoMmioLib|Include/Library/XenIoMmioLib.h 54 55 [Guids] 56 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}} 57 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}} 58 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}} 59 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}} 60 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}} 61 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}} 62 63 [Protocols] 64 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}} 65 gBlockMmioProtocolGuid = {0x6b558ce3, 0x69e5, 0x4c67, {0xa6, 0x34, 0xf7, 0xfe, 0x72, 0xad, 0xbe, 0x84}} 66 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}} 67 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}} 68 69 [PcdsFixedAtBuild] 70 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0 71 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1 72 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15 73 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16 74 75 ## This flag is used to control the destination port for PlatformDebugLibIoPort 76 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4 77 78 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and 79 # LUNs are retrieved from the host during virtio-scsi setup. 80 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun 81 # possible devices. This can take extremely long, for example with 82 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit 83 # MaxTarget and MaxLun, independently, should the host report higher values, 84 # so that scanning the number of devices given by their product is still 85 # acceptably fast. 86 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6 87 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7 88 89 ## The following setting controls how many megabytes we configure as TSEG on 90 # Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause 91 # undefined behavior. 92 # 93 # This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below). 94 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT8|0x20 95 96 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8 97 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9 98 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa 99 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb 100 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc 101 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd 102 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe 103 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf 104 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11 105 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12 106 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13 107 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14 108 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18 109 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19 110 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a 111 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f 112 113 [PcdsDynamic, PcdsDynamicEx] 114 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2 115 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10 116 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b 117 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21 118 119 ## The IO port aperture shared by all PCI root bridges. 120 # 121 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22 122 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23 123 124 ## The 32-bit MMIO aperture shared by all PCI root bridges. 125 # 126 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24 127 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25 128 129 ## The 64-bit MMIO aperture shared by all PCI root bridges. 130 # 131 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26 132 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27 133 134 [PcdsFeatureFlag] 135 gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootEnable|FALSE|BOOLEAN|3 136 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c 137 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d 138 139 ## This feature flag enables SMM/SMRAM support. Note that it also requires 140 # such support from the underlying QEMU instance; if that support is not 141 # present, the firmware will reject continuing after a certain point. 142 # 143 # The flag also acts as a general "security switch"; when TRUE, many 144 # components will change behavior, with the goal of preventing a malicious 145 # runtime OS from tampering with firmware structures (special memory ranges 146 # used by OVMF, the varstore pflash chip, LockBox etc). 147 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e 148
