1 /** @file 2 This file contains the definination for host controller memory 3 management routines. 4 5 Copyright (c) 2013-2015 Intel Corporation. 6 7 This program and the accompanying materials 8 are licensed and made available under the terms and conditions of the BSD License 9 which accompanies this distribution. The full text of the license may be found at 10 http://opensource.org/licenses/bsd-license.php 11 12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 15 **/ 16 17 #ifndef _USB_HC_MEM_H_ 18 #define _USB_HC_MEM_H_ 19 20 #define USB_HC_BIT(a) ((UINTN)(1 << (a))) 21 22 #define USB_HC_BIT_IS_SET(Data, Bit) \ 23 ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit))) 24 25 #define USB_HC_HIGH_32BIT(Addr64) \ 26 ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF)) 27 28 typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK; 29 struct _USBHC_MEM_BLOCK { 30 UINT8 *Bits; // Bit array to record which unit is allocated 31 UINTN BitsLen; 32 UINT8 *Buf; 33 UINT8 *BufHost; 34 UINTN BufLen; // Memory size in bytes 35 VOID *Mapping; 36 USBHC_MEM_BLOCK *Next; 37 }; 38 39 // 40 // USBHC_MEM_POOL is used to manage the memory used by USB 41 // host controller. EHCI requires the control memory and transfer 42 // data to be on the same 4G memory. 43 // 44 typedef struct _USBHC_MEM_POOL { 45 EFI_PCI_IO_PROTOCOL *PciIo; 46 BOOLEAN Check4G; 47 UINT32 Which4G; 48 USBHC_MEM_BLOCK *Head; 49 } USBHC_MEM_POOL; 50 51 // 52 // Memory allocation unit, must be 2^n, n>4 53 // 54 #define USBHC_MEM_UNIT 64 55 56 #define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1) 57 #define USBHC_MEM_DEFAULT_PAGES 16 58 59 #define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK)) 60 61 // 62 // Advance the byte and bit to the next bit, adjust byte accordingly. 63 // 64 #define NEXT_BIT(Byte, Bit) \ 65 do { \ 66 (Bit)++; \ 67 if ((Bit) > 7) { \ 68 (Byte)++; \ 69 (Bit) = 0; \ 70 } \ 71 } while (0) 72 73 74 75 /** 76 Initialize the memory management pool for the host controller. 77 78 @param PciIo The PciIo that can be used to access the host controller. 79 @param Check4G Whether the host controller requires allocated memory 80 from one 4G address space. 81 @param Which4G The 4G memory area each memory allocated should be from. 82 83 @retval EFI_SUCCESS The memory pool is initialized. 84 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool. 85 86 **/ 87 USBHC_MEM_POOL * 88 UsbHcInitMemPool ( 89 IN EFI_PCI_IO_PROTOCOL *PciIo, 90 IN BOOLEAN Check4G, 91 IN UINT32 Which4G 92 ); 93 94 95 /** 96 Release the memory management pool. 97 98 @param Pool The USB memory pool to free. 99 100 @retval EFI_SUCCESS The memory pool is freed. 101 @retval EFI_DEVICE_ERROR Failed to free the memory pool. 102 103 **/ 104 EFI_STATUS 105 UsbHcFreeMemPool ( 106 IN USBHC_MEM_POOL *Pool 107 ); 108 109 110 /** 111 Allocate some memory from the host controller's memory pool 112 which can be used to communicate with host controller. 113 114 @param Pool The host controller's memory pool. 115 @param Size Size of the memory to allocate. 116 117 @return The allocated memory or NULL. 118 119 **/ 120 VOID * 121 UsbHcAllocateMem ( 122 IN USBHC_MEM_POOL *Pool, 123 IN UINTN Size 124 ); 125 126 127 /** 128 Free the allocated memory back to the memory pool. 129 130 @param Pool The memory pool of the host controller. 131 @param Mem The memory to free. 132 @param Size The size of the memory to free. 133 134 **/ 135 VOID 136 UsbHcFreeMem ( 137 IN USBHC_MEM_POOL *Pool, 138 IN VOID *Mem, 139 IN UINTN Size 140 ); 141 142 /** 143 Calculate the corresponding pci bus address according to the Mem parameter. 144 145 @param Pool The memory pool of the host controller. 146 @param Mem The pointer to host memory. 147 @param Size The size of the memory region. 148 149 @return the pci memory address 150 **/ 151 EFI_PHYSICAL_ADDRESS 152 UsbHcGetPciAddressForHostMem ( 153 IN USBHC_MEM_POOL *Pool, 154 IN VOID *Mem, 155 IN UINTN Size 156 ); 157 158 #endif 159
