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      1 ;------------------------------------------------------------------------------
      2 ; @file
      3 ; Main routine of the pre-SEC code up through the jump into SEC
      4 ;
      5 ; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
      6 ; This program and the accompanying materials
      7 ; are licensed and made available under the terms and conditions of the BSD License
      8 ; which accompanies this distribution.  The full text of the license may be found at
      9 ; http://opensource.org/licenses/bsd-license.php
     10 ;
     11 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     12 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     13 ;
     14 ;------------------------------------------------------------------------------
     15 
     16 
     17 BITS    16
     18 
     19 ;
     20 ; Modified:  EBX, ECX, EDX, EBP
     21 ;
     22 ; @param[in,out]  RAX/EAX  Initial value of the EAX register
     23 ;                          (BIST: Built-in Self Test)
     24 ; @param[in,out]  DI       'BP': boot-strap processor, or
     25 ;                          'AP': application processor
     26 ; @param[out]     RBP/EBP  Address of Boot Firmware Volume (BFV)
     27 ;
     28 ; @return         None  This routine jumps to SEC and does not return
     29 ;
     30 Main16:
     31     OneTimeCall EarlyInit16
     32 
     33     ;
     34     ; Transition the processor from 16-bit real mode to 32-bit flat mode
     35     ;
     36     OneTimeCall TransitionFromReal16To32BitFlat
     37 
     38 BITS    32
     39 
     40     ;
     41     ; Search for the Boot Firmware Volume (BFV)
     42     ;
     43     OneTimeCall Flat32SearchForBfvBase
     44 
     45     ;
     46     ; EBP - Start of BFV
     47     ;
     48 
     49     ;
     50     ; Search for the SEC entry point
     51     ;
     52     OneTimeCall Flat32SearchForSecEntryPoint
     53 
     54     ;
     55     ; ESI - SEC Core entry point
     56     ; EBP - Start of BFV
     57     ;
     58 
     59 %ifdef ARCH_IA32
     60 
     61     ;
     62     ; Restore initial EAX value into the EAX register
     63     ;
     64     mov     eax, esp
     65 
     66     ;
     67     ; Jump to the 32-bit SEC entry point
     68     ;
     69     jmp     esi
     70 
     71 %else
     72 
     73     ;
     74     ; Transition the processor from 32-bit flat mode to 64-bit flat mode
     75     ;
     76     OneTimeCall Transition32FlatTo64Flat
     77 
     78 BITS    64
     79 
     80     ;
     81     ; Some values were calculated in 32-bit mode.  Make sure the upper
     82     ; 32-bits of 64-bit registers are zero for these values.
     83     ;
     84     mov     rax, 0x00000000ffffffff
     85     and     rsi, rax
     86     and     rbp, rax
     87     and     rsp, rax
     88 
     89     ;
     90     ; RSI - SEC Core entry point
     91     ; RBP - Start of BFV
     92     ;
     93 
     94     ;
     95     ; Restore initial EAX value into the RAX register
     96     ;
     97     mov     rax, rsp
     98 
     99     ;
    100     ; Jump to the 64-bit SEC entry point
    101     ;
    102     jmp     rsi
    103 
    104 %endif
    105 
    106 
    107