1 /*++ 2 3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR> 4 5 This program and the accompanying materials are licensed and made available under 7 the terms and conditions of the BSD License that accompanies this distribution. 9 The full text of the license may be found at 11 http://opensource.org/licenses/bsd-license.php. 13 15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 19 21 23 **/ 24 25 #ifndef __I2C_HOST_H__ 26 #define __I2C_HOST_H__ 27 28 #include <Protocol/I2cMasterMcg.h> 29 30 /** 31 Declare the forward references 32 33 **/ 34 typedef struct _EFI_I2C_HOST_PROTOCOL EFI_I2C_HOST_PROTOCOL; 35 typedef struct _EFI_I2C_HOST_CALLBACKS EFI_I2C_HOST_CALLBACKS; 36 37 38 /** 39 Queue an I2C operation for execution on the I2C controller. 40 41 This routine must be called at or below TPL_NOTIFY. For synchronous 42 requests this routine must be called at or below TPL_CALLBACK. 43 44 N.B. The typical consumers of this API are the I2C bus driver and 45 on rare occasions the I2C test application. Extreme care must be 46 taken by other consumers of this API to prevent confusing the 47 third party I2C drivers due to a state change at the I2C device 48 which the third party I2C drivers did not initiate. I2C platform 49 drivers may use this API within these guidelines. 50 51 This layer uses the concept of I2C bus configurations to describe 52 the I2C bus. An I2C bus configuration is defined as a unique 53 setting of the multiplexers and switches in the I2C bus which 54 enable access to one or more I2C devices. When using a switch 55 to divide a bus, due to speed differences, the I2C platform layer 56 would define an I2C bus configuration for the I2C devices on each 57 side of the switch. When using a multiplexer, the I2C platform 58 layer defines an I2C bus configuration for each of the selector 59 values required to control the multiplexer. See Figure 1 in the 60 <a href="http://www.nxp.com/documents/user_manual/UM10204.pdf">I<sup>2</sup>C 61 Specification</a> for a complex I2C bus configuration. 62 63 The I2C host driver processes all operations in FIFO order. Prior to 64 performing the operation, the I2C host driver calls the I2C platform 65 driver to reconfigure the switches and multiplexers in the I2C bus 66 enabling access to the specified I2C device. The I2C platform driver 67 also selects the maximum bus speed for the device. After the I2C bus 68 is configured, the I2C host driver calls the I2C port driver to 69 initialize the I2C controller and start the I2C operation. 70 71 @param[in] This Address of an EFI_I2C_HOST_PROTOCOL instance. 72 @param[in] I2cBusConfiguration I2C bus configuration to access the I2C 73 device. 74 @param[in] SlaveAddress Address of the device on the I2C bus. 75 @param[in] Event Event to set for asynchronous operations, 76 NULL for synchronous operations 77 @param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET 78 structure describing the I2C operation 79 @param[out] I2cStatus Optional buffer to receive the I2C operation 80 completion status 81 82 @retval EFI_SUCCESS The operation completed successfully. 83 @retval EFI_ABORTED The request did not complete because the driver 84 was shutdown. 85 @retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large. 86 @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation. 87 This could indicate the slave device is not present. 88 @retval EFI_INVALID_PARAMETER RequestPacket is NULL 89 @retval EFI_INVALID_PARAMETER TPL is too high 90 @retval EFI_NO_MAPPING Invalid I2cBusConfiguration value 91 @retval EFI_NO_RESPONSE The I2C device is not responding to the 92 slave address. EFI_DEVICE_ERROR may also be 93 returned if the controller cannot distinguish 94 when the NACK occurred. 95 @retval EFI_NOT_FOUND I2C slave address exceeds maximum address 96 @retval EFI_NOT_READY I2C bus is busy or operation pending, wait for 97 the event and then read status pointed to by 98 the request packet. 99 @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation 100 @retval EFI_TIMEOUT The transaction did not complete within an internally 101 specified timeout period. 102 103 **/ 104 typedef 105 EFI_STATUS 106 (EFIAPI *EFI_I2C_HOST_QUEUE_REQUEST) ( 107 IN CONST EFI_I2C_HOST_PROTOCOL *This, 108 IN UINTN I2cBusConfiguration, 109 IN UINTN SlaveAddress, 110 IN EFI_EVENT Event OPTIONAL, 111 IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket, 112 OUT EFI_STATUS *I2cStatus OPTIONAL 113 ); 114 115 /// 116 /// Host access to the I2C bus. 117 /// 118 struct _EFI_I2C_HOST_PROTOCOL { 119 /// 120 /// Queue an operation for execution on the I2C bus 121 /// 122 EFI_I2C_HOST_QUEUE_REQUEST QueueRequest; 123 124 /// 125 /// The maximum number of I2C bus configurations 126 /// 127 UINTN I2cBusConfigurationCount; 128 129 /// 130 /// The maximum number of bytes the I2C host controller 131 /// is able to receive from the I2C bus. 132 /// 133 UINT32 MaximumReceiveBytes; 134 135 /// 136 /// The maximum number of bytes the I2C host controller 137 /// is able to send on the I2C bus. 138 /// 139 UINT32 MaximumTransmitBytes; 140 141 /// 142 /// The maximum number of bytes in the I2C bus transaction. 143 /// 144 UINT32 MaximumTotalBytes; 145 }; 146 147 /// 148 /// GUID for the EFI_I2C_HOST_PROTOCOL 149 /// 150 extern EFI_GUID gEfiI2cHostProtocolGuid; 151 152 #endif // __I2C_HOST_H__ 153
