1 /** @file 2 3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR> 4 5 This program and the accompanying materials are licensed and made available under 7 the terms and conditions of the BSD License that accompanies this distribution. 9 The full text of the license may be found at 11 http://opensource.org/licenses/bsd-license.php. 13 15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 19 21 23 Module Name: 24 25 26 ClockControl.c 27 28 Abstract: 29 30 Sets platform/SKU specific clock routing information. 31 32 33 34 --*/ 35 36 #include "PlatformDxe.h" 37 #include <Protocol/CK505ClockPlatformInfo.h> 38 39 // 40 // Default clock routing informtion (All On) 41 // 42 EFI_CLOCK_PLATFORM_INFO mDefClockPolicy = {NULL, 0, NULL, 0, NULL, 0}; 43 44 // 45 // Clock Settings 46 // 47 // Static clock table. 48 // This should be used to define any clock settings that are static 49 // (Always On or Always Off). Dynamic clocks should be set to enabled 50 // in this table. 51 // 52 EFI_STATIC_SIGNALS mAtxStaticClocks[] = { 53 {SrcClk8, Enabled, All}, 54 {SrcClk7, Enabled, All}, 55 {SrcClk6, Enabled, All}, 56 {SrcClk5, Enabled, All}, 57 {SrcClk4, Enabled, All}, 58 {SrcClk3, Enabled, All}, 59 {SrcClk2, Enabled, All}, 60 {SrcClk1, Enabled, All}, 61 {SrcClk0, Enabled, All}, 62 {Ref0, Enabled, All}, 63 {Dot96, Enabled, All}, 64 {Usb48, Enabled, All}, 65 {PciClkF5, Enabled, All}, 66 {PciClk0, Enabled, All}, 67 {PciClk2, Enabled, All}, 68 {PciClk3, Enabled, All}, 69 {PciClk4, Disabled, All}, 70 {Cr_B, EnabledWithSwitch, All}, 71 }; 72 73 // 74 // ClockSxInfo Table 75 // This is a list of clocks that need to be set to a known state when the 76 // system enters S4 or S5. 77 // 78 EFI_STATIC_SIGNALS mAtxSxClocks[] = { 79 {SaveClockConfiguration, Disabled, All} 80 }; 81 82 // 83 // ATX settings structure 84 // 85 EFI_CLOCK_PLATFORM_INFO mAtxClockSettings = { 86 mAtxStaticClocks, 87 sizeof(mAtxStaticClocks) / sizeof(mAtxStaticClocks[0]), 88 mAtxSxClocks, 89 sizeof(mAtxSxClocks) / sizeof(mAtxSxClocks[0]) 90 }; 91 92 #if defined( RVP_SUPPORT ) && RVP_SUPPORT 93 // 94 // RVP Clock Settings 95 // 96 // Static clock table. 97 // This should be used to define any clock settings that are static 98 // (Always On or Always Off). Dynamic clocks should be set to enabled 99 // in this table. 100 // 101 //UPSD_TBD Check with Jan if any porting required. 102 // 103 EFI_STATIC_SIGNALS mRvpStaticClocks[] = { 104 {SrcClk11, Enabled, All}, // Not used/not present but leave coding enabled 105 {SrcClk10, Enabled, All}, // Not used/not present but leave coding enabled 106 {SrcClk9, Enabled, All}, // Not used/not present but leave coding enabled 107 {SrcClk8, Enabled, All}, // ICHSATAII 108 {SrcClk7, Enabled, All}, // DPL_REFSSCLKIN 109 {SrcClk6, Enabled, All}, // 100M_MCH 110 {SrcClk5, Enabled, All}, // Mini-PCIe //TODO PNV: Need to check ICH GPIO38: 111 // 0: turn on; 1: turn off 112 {SrcClk4, Enabled, All}, // ICHSATA 113 {SrcClk3, Enabled, All}, // 100M_ICH 114 {SrcClk2, Enabled, All}, // 100M_LAN 115 {SrcClk1, Enabled, All}, // 25M_LAN 116 {SrcClk0, Enabled, All}, // 96M_DREF 117 {Ref0, Enabled, All}, 118 {Dot96, Enabled, All}, 119 {Usb48, Enabled, All}, 120 {PciClkF5, Enabled, All}, // 33M_ICH 121 {PciClk0, Enabled, All}, // 33M_RISER 122 {PciClk1, Enabled, All}, // 33M_RISER 123 {PciClk2, Enabled, All}, // VDD_Clock 124 {PciClk3, Enabled, All}, // 33M_S1 125 {PciClk4, Enabled, All}, // 33M_PA 126 }; 127 128 // 129 // Dynamic clock table 130 // This is used to determine if a clock should be left on or turned off based 131 // on the presence of a device. The bridge information is used so the bus 132 // number for the device to be detected can be found. 133 // 134 135 // 136 // ClockSxInfo Table 137 // This is a list of clocks that need to be set to a known state when the 138 // system enters S4 or S5. 139 // 140 EFI_STATIC_SIGNALS mRvpSxClocks[] = { 141 {SaveClockConfiguration, Disabled, All} 142 }; 143 144 // 145 // RVP settings structure 146 // 147 EFI_CLOCK_PLATFORM_INFO mRvpClockSettings = { 148 mRvpStaticClocks, 149 sizeof(mRvpStaticClocks) / sizeof(mRvpStaticClocks[0]), 150 0, // No clocks will be turned off mRvpDynamicClocks, 151 0, // No clocks will be turned off sizeof(mRvpDynamicClocks) / sizeof(mRvpDynamicClocks[0]), 152 mRvpSxClocks, 153 sizeof(mRvpSxClocks) / sizeof(mRvpSxClocks[0]) 154 }; 155 #endif 156 157 VOID 158 InitializeClockRouting( 159 ) 160 { 161 EFI_STATUS Status; 162 UINTN BoardIdVarSize; 163 EFI_BOARD_FEATURES BoardIdVar; 164 EFI_CLOCK_PLATFORM_INFO *ClockPolicy; 165 EFI_HANDLE Handle; 166 167 ClockPolicy = &mDefClockPolicy; 168 169 // 170 // Do modifications based on board type 171 // 172 BoardIdVarSize = sizeof (EFI_BOARD_FEATURES); 173 Status = gRT->GetVariable ( 174 BOARD_FEATURES_NAME, 175 &gEfiBoardFeaturesGuid, 176 NULL, 177 &BoardIdVarSize, 178 &BoardIdVar 179 ); 180 if (!EFI_ERROR (Status)) { 181 182 #if defined( RVP_SUPPORT ) && RVP_SUPPORT 183 if (BoardIdVar & B_BOARD_FEATURES_RVP) { 184 ClockPolicy = &mRvpClockSettings; 185 } 186 #else 187 188 // 189 // Isolate board type information 190 // 191 BoardIdVar = BoardIdVar & (B_BOARD_FEATURES_FORM_FACTOR_ATX | 192 B_BOARD_FEATURES_FORM_FACTOR_BTX | 193 B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX | 194 B_BOARD_FEATURES_FORM_FACTOR_MICRO_BTX); 195 196 if (BoardIdVar == B_BOARD_FEATURES_FORM_FACTOR_ATX || 197 BoardIdVar == B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX) { 198 ClockPolicy = &mAtxClockSettings; 199 } 200 201 #endif 202 203 } 204 205 Handle = NULL; 206 Status = gBS->InstallProtocolInterface ( 207 &Handle, 208 &gEfiCk505ClockPlatformInfoGuid, 209 EFI_NATIVE_INTERFACE, 210 ClockPolicy 211 ); 212 ASSERT_EFI_ERROR(Status); 213 214 } 215 216 217
