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      1 #
      2 #
      3 # Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
      4 #                                                                                  

      6 # This program and the accompanying materials are licensed and made available under

      8 # the terms and conditions of the BSD License that accompanies this distribution.  

     10 # The full text of the license may be found at                                     

     12 # http://opensource.org/licenses/bsd-license.php.                                  

     14 #                                                                                  

     16 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            

     18 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    

     20 #                                                                                  

     22 #
     23 # This PEIM includes 3 parts, pre memory initialization, MRC
     24 #  wrapper and post memory initialization.
     25 #  On pre memory, following action is performed,
     26 #  1. Initizluize GMCH.
     27 #  2. Detect boot mode.
     28 #  3. Detect video adapter to determine whether we need pre allocated
     29 #  memory.
     30 #
     31 #  After that MRC wrapper calls MRC to initialize memory and install a PPI
     32 #  notify to do post memory
     33 #  initialization. MRC wrapper performance following actions,
     34 #  1. Install EFI Memory.
     35 #  2. Capsule coalesce if capsule boot mode.
     36 #  3. Create HOB of system memory.
     37 #  Note: MRC supports 3 kinds of chipsets including Lakeport, Glenwood and Mukilteo,
     38 #   so please don't define MACRO MUKILTEO_SUPPORT on Lakeport here.
     39 #
     40 #  On post memory, following action is performed,
     41 #  1. TC initialization after MRC.
     42 #  2. SIO initialization.
     43 #  3. Install ResetSystem and FinvFv PPI, relocate Stall to memory on
     44 #   recovery boot mode.
     45 #  4. Set MTRR for PEI
     46 #  5. Create FV HOB and Flash HOB
     47 #  6. Install RecoveryModule and AtaController PPI if on recovery boot mode.
     48 #
     49 #  This PEIM does not have any register access directly, it depends on
     50 #  IntelTCLib, TCAccess libraries to access Chipset
     51 #  registers.
     52 #
     53 #  Platform.c - Provide main flow and entrypoint of PEIM.
     54 #  MemoryCallback.c - Includes a memory call back function notified when
     55 #     MRC is done.
     56 #
     57 #
     58 
     59 [Defines]
     60   INF_VERSION                    = 0x00010005
     61   BASE_NAME                      = PlatformPeim
     62   FILE_GUID                      = 9618C0DC-50A4-496c-994F-7241F282ED01
     63   MODULE_TYPE                    = PEIM
     64   VERSION_STRING                 = 1.0
     65   ENTRY_POINT                    = PeiInitPlatform
     66   PI_SPECIFICATION_VERSION	   = 0x0001000A
     67 
     68 [sources.common]
     69   Platform.c
     70   Platform.h
     71   MemoryCallback.c
     72   CommonHeader.h
     73   Stall.c
     74   BootMode.c
     75 
     76 
     77 [Packages]
     78   MdePkg/MdePkg.dec
     79   MdeModulePkg/MdeModulePkg.dec
     80   Vlv2TbltDevicePkg/PlatformPkg.dec
     81   IntelFrameworkPkg/IntelFrameworkPkg.dec
     82   Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
     83   IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec
     84   UefiCpuPkg/UefiCpuPkg.dec
     85   CryptoPkg/CryptoPkg.dec
     86   EdkCompatibilityPkg/EdkCompatibilityPkg.dec
     87 
     88 [LibraryClasses]
     89   PeimEntryPoint
     90   DebugLib
     91   HobLib
     92   IoLib
     93   MultiPlatformLib
     94   MtrrLib
     95   PerformanceLib
     96   MonoStatusCodeLib
     97   BaseCryptLib
     98   PciLib
     99 
    100 [Ppis]
    101   gEfiPeiStallPpiGuid
    102   gPeiSpeakerInterfacePpiGuid
    103   gEfiPeiMemoryDiscoveredPpiGuid
    104   gVlvPolicyPpiGuid
    105   gEfiPeiReadOnlyVariable2PpiGuid
    106   gEfiPeiResetPpiGuid
    107   gEfiEndOfPeiSignalPpiGuid
    108   gEfiFindFvPpiGuid
    109   gPeiCapsulePpiGuid
    110   gEfiPeiBootInRecoveryModePpiGuid
    111   gEfiPeiRecoveryModulePpiGuid
    112   gEfiPeiDeviceRecoveryModulePpiGuid
    113   gPeiCachePpiGuid
    114   gEfiPeiMasterBootModePpiGuid
    115   gEfiPeiSmbusPpiGuid
    116   gPeiMfgMemoryTestPpiGuid
    117   gPeiSha256HashPpiGuid
    118   gVlvMmioPolicyPpiGuid
    119   gSeCfTPMPolicyPpiGuid
    120 
    121 [Guids]
    122   gEfiSetupVariableGuid
    123   gEfiPlatformInfoGuid
    124   gEfiPlatformBootModeGuid
    125   gEfiPlatformCpuInfoGuid
    126   gEfiGlobalVariableGuid
    127   gRecoveryOnFatFloppyDiskGuid
    128   gRecoveryOnFatUsbDiskGuid
    129   gRecoveryOnFatIdeDiskGuid
    130   gRecoveryOnDataCdGuid
    131   gMfgModeVariableGuid
    132   gEfiNormalSetupGuid
    133   gEfiBootStateGuid
    134   gEfiVlv2VariableGuid
    135 
    136 [Pcd.common]
    137   gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
    138   gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
    139   gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base
    140   gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
    141   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
    142   gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress
    143   gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize
    144 [Depex]
    145   TRUE
    146 
    147