1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2 |* *| 3 |*Target Instruction Enum Values *| 4 |* *| 5 |* Automatically generated file, do not edit! *| 6 |* *| 7 \*===----------------------------------------------------------------------===*/ 8 9 /* Capstone Disassembly Engine */ 10 /* By Nguyen Anh Quynh <aquynh (at) gmail.com>, 2013-2014 */ 11 12 13 #ifdef GET_INSTRINFO_ENUM 14 #undef GET_INSTRINFO_ENUM 15 16 enum { 17 XCore_PHI = 0, 18 XCore_INLINEASM = 1, 19 XCore_CFI_INSTRUCTION = 2, 20 XCore_EH_LABEL = 3, 21 XCore_GC_LABEL = 4, 22 XCore_KILL = 5, 23 XCore_EXTRACT_SUBREG = 6, 24 XCore_INSERT_SUBREG = 7, 25 XCore_IMPLICIT_DEF = 8, 26 XCore_SUBREG_TO_REG = 9, 27 XCore_COPY_TO_REGCLASS = 10, 28 XCore_DBG_VALUE = 11, 29 XCore_REG_SEQUENCE = 12, 30 XCore_COPY = 13, 31 XCore_BUNDLE = 14, 32 XCore_LIFETIME_START = 15, 33 XCore_LIFETIME_END = 16, 34 XCore_STACKMAP = 17, 35 XCore_PATCHPOINT = 18, 36 XCore_LOAD_STACK_GUARD = 19, 37 XCore_ADD_2rus = 20, 38 XCore_ADD_3r = 21, 39 XCore_ADJCALLSTACKDOWN = 22, 40 XCore_ADJCALLSTACKUP = 23, 41 XCore_ANDNOT_2r = 24, 42 XCore_AND_3r = 25, 43 XCore_ASHR_l2rus = 26, 44 XCore_ASHR_l3r = 27, 45 XCore_BAU_1r = 28, 46 XCore_BITREV_l2r = 29, 47 XCore_BLACP_lu10 = 30, 48 XCore_BLACP_u10 = 31, 49 XCore_BLAT_lu6 = 32, 50 XCore_BLAT_u6 = 33, 51 XCore_BLA_1r = 34, 52 XCore_BLRB_lu10 = 35, 53 XCore_BLRB_u10 = 36, 54 XCore_BLRF_lu10 = 37, 55 XCore_BLRF_u10 = 38, 56 XCore_BRBF_lru6 = 39, 57 XCore_BRBF_ru6 = 40, 58 XCore_BRBT_lru6 = 41, 59 XCore_BRBT_ru6 = 42, 60 XCore_BRBU_lu6 = 43, 61 XCore_BRBU_u6 = 44, 62 XCore_BRFF_lru6 = 45, 63 XCore_BRFF_ru6 = 46, 64 XCore_BRFT_lru6 = 47, 65 XCore_BRFT_ru6 = 48, 66 XCore_BRFU_lu6 = 49, 67 XCore_BRFU_u6 = 50, 68 XCore_BRU_1r = 51, 69 XCore_BR_JT = 52, 70 XCore_BR_JT32 = 53, 71 XCore_BYTEREV_l2r = 54, 72 XCore_CHKCT_2r = 55, 73 XCore_CHKCT_rus = 56, 74 XCore_CLRE_0R = 57, 75 XCore_CLRPT_1R = 58, 76 XCore_CLRSR_branch_lu6 = 59, 77 XCore_CLRSR_branch_u6 = 60, 78 XCore_CLRSR_lu6 = 61, 79 XCore_CLRSR_u6 = 62, 80 XCore_CLZ_l2r = 63, 81 XCore_CRC8_l4r = 64, 82 XCore_CRC_l3r = 65, 83 XCore_DCALL_0R = 66, 84 XCore_DENTSP_0R = 67, 85 XCore_DGETREG_1r = 68, 86 XCore_DIVS_l3r = 69, 87 XCore_DIVU_l3r = 70, 88 XCore_DRESTSP_0R = 71, 89 XCore_DRET_0R = 72, 90 XCore_ECALLF_1r = 73, 91 XCore_ECALLT_1r = 74, 92 XCore_EDU_1r = 75, 93 XCore_EEF_2r = 76, 94 XCore_EET_2r = 77, 95 XCore_EEU_1r = 78, 96 XCore_EH_RETURN = 79, 97 XCore_ENDIN_2r = 80, 98 XCore_ENTSP_lu6 = 81, 99 XCore_ENTSP_u6 = 82, 100 XCore_EQ_2rus = 83, 101 XCore_EQ_3r = 84, 102 XCore_EXTDP_lu6 = 85, 103 XCore_EXTDP_u6 = 86, 104 XCore_EXTSP_lu6 = 87, 105 XCore_EXTSP_u6 = 88, 106 XCore_FRAME_TO_ARGS_OFFSET = 89, 107 XCore_FREER_1r = 90, 108 XCore_FREET_0R = 91, 109 XCore_GETD_l2r = 92, 110 XCore_GETED_0R = 93, 111 XCore_GETET_0R = 94, 112 XCore_GETID_0R = 95, 113 XCore_GETKEP_0R = 96, 114 XCore_GETKSP_0R = 97, 115 XCore_GETN_l2r = 98, 116 XCore_GETPS_l2r = 99, 117 XCore_GETR_rus = 100, 118 XCore_GETSR_lu6 = 101, 119 XCore_GETSR_u6 = 102, 120 XCore_GETST_2r = 103, 121 XCore_GETTS_2r = 104, 122 XCore_INCT_2r = 105, 123 XCore_INITCP_2r = 106, 124 XCore_INITDP_2r = 107, 125 XCore_INITLR_l2r = 108, 126 XCore_INITPC_2r = 109, 127 XCore_INITSP_2r = 110, 128 XCore_INPW_l2rus = 111, 129 XCore_INSHR_2r = 112, 130 XCore_INT_2r = 113, 131 XCore_IN_2r = 114, 132 XCore_Int_MemBarrier = 115, 133 XCore_KCALL_1r = 116, 134 XCore_KCALL_lu6 = 117, 135 XCore_KCALL_u6 = 118, 136 XCore_KENTSP_lu6 = 119, 137 XCore_KENTSP_u6 = 120, 138 XCore_KRESTSP_lu6 = 121, 139 XCore_KRESTSP_u6 = 122, 140 XCore_KRET_0R = 123, 141 XCore_LADD_l5r = 124, 142 XCore_LD16S_3r = 125, 143 XCore_LD8U_3r = 126, 144 XCore_LDA16B_l3r = 127, 145 XCore_LDA16F_l3r = 128, 146 XCore_LDAPB_lu10 = 129, 147 XCore_LDAPB_u10 = 130, 148 XCore_LDAPF_lu10 = 131, 149 XCore_LDAPF_lu10_ba = 132, 150 XCore_LDAPF_u10 = 133, 151 XCore_LDAWB_l2rus = 134, 152 XCore_LDAWB_l3r = 135, 153 XCore_LDAWCP_lu6 = 136, 154 XCore_LDAWCP_u6 = 137, 155 XCore_LDAWDP_lru6 = 138, 156 XCore_LDAWDP_ru6 = 139, 157 XCore_LDAWFI = 140, 158 XCore_LDAWF_l2rus = 141, 159 XCore_LDAWF_l3r = 142, 160 XCore_LDAWSP_lru6 = 143, 161 XCore_LDAWSP_ru6 = 144, 162 XCore_LDC_lru6 = 145, 163 XCore_LDC_ru6 = 146, 164 XCore_LDET_0R = 147, 165 XCore_LDIVU_l5r = 148, 166 XCore_LDSED_0R = 149, 167 XCore_LDSPC_0R = 150, 168 XCore_LDSSR_0R = 151, 169 XCore_LDWCP_lru6 = 152, 170 XCore_LDWCP_lu10 = 153, 171 XCore_LDWCP_ru6 = 154, 172 XCore_LDWCP_u10 = 155, 173 XCore_LDWDP_lru6 = 156, 174 XCore_LDWDP_ru6 = 157, 175 XCore_LDWFI = 158, 176 XCore_LDWSP_lru6 = 159, 177 XCore_LDWSP_ru6 = 160, 178 XCore_LDW_2rus = 161, 179 XCore_LDW_3r = 162, 180 XCore_LMUL_l6r = 163, 181 XCore_LSS_3r = 164, 182 XCore_LSUB_l5r = 165, 183 XCore_LSU_3r = 166, 184 XCore_MACCS_l4r = 167, 185 XCore_MACCU_l4r = 168, 186 XCore_MJOIN_1r = 169, 187 XCore_MKMSK_2r = 170, 188 XCore_MKMSK_rus = 171, 189 XCore_MSYNC_1r = 172, 190 XCore_MUL_l3r = 173, 191 XCore_NEG = 174, 192 XCore_NOT = 175, 193 XCore_OR_3r = 176, 194 XCore_OUTCT_2r = 177, 195 XCore_OUTCT_rus = 178, 196 XCore_OUTPW_l2rus = 179, 197 XCore_OUTSHR_2r = 180, 198 XCore_OUTT_2r = 181, 199 XCore_OUT_2r = 182, 200 XCore_PEEK_2r = 183, 201 XCore_REMS_l3r = 184, 202 XCore_REMU_l3r = 185, 203 XCore_RETSP_lu6 = 186, 204 XCore_RETSP_u6 = 187, 205 XCore_SELECT_CC = 188, 206 XCore_SETCLK_l2r = 189, 207 XCore_SETCP_1r = 190, 208 XCore_SETC_l2r = 191, 209 XCore_SETC_lru6 = 192, 210 XCore_SETC_ru6 = 193, 211 XCore_SETDP_1r = 194, 212 XCore_SETD_2r = 195, 213 XCore_SETEV_1r = 196, 214 XCore_SETKEP_0R = 197, 215 XCore_SETN_l2r = 198, 216 XCore_SETPSC_2r = 199, 217 XCore_SETPS_l2r = 200, 218 XCore_SETPT_2r = 201, 219 XCore_SETRDY_l2r = 202, 220 XCore_SETSP_1r = 203, 221 XCore_SETSR_branch_lu6 = 204, 222 XCore_SETSR_branch_u6 = 205, 223 XCore_SETSR_lu6 = 206, 224 XCore_SETSR_u6 = 207, 225 XCore_SETTW_l2r = 208, 226 XCore_SETV_1r = 209, 227 XCore_SEXT_2r = 210, 228 XCore_SEXT_rus = 211, 229 XCore_SHL_2rus = 212, 230 XCore_SHL_3r = 213, 231 XCore_SHR_2rus = 214, 232 XCore_SHR_3r = 215, 233 XCore_SSYNC_0r = 216, 234 XCore_ST16_l3r = 217, 235 XCore_ST8_l3r = 218, 236 XCore_STET_0R = 219, 237 XCore_STSED_0R = 220, 238 XCore_STSPC_0R = 221, 239 XCore_STSSR_0R = 222, 240 XCore_STWDP_lru6 = 223, 241 XCore_STWDP_ru6 = 224, 242 XCore_STWFI = 225, 243 XCore_STWSP_lru6 = 226, 244 XCore_STWSP_ru6 = 227, 245 XCore_STW_2rus = 228, 246 XCore_STW_l3r = 229, 247 XCore_SUB_2rus = 230, 248 XCore_SUB_3r = 231, 249 XCore_SYNCR_1r = 232, 250 XCore_TESTCT_2r = 233, 251 XCore_TESTLCL_l2r = 234, 252 XCore_TESTWCT_2r = 235, 253 XCore_TSETMR_2r = 236, 254 XCore_TSETR_3r = 237, 255 XCore_TSTART_1R = 238, 256 XCore_WAITEF_1R = 239, 257 XCore_WAITET_1R = 240, 258 XCore_WAITEU_0R = 241, 259 XCore_XOR_l3r = 242, 260 XCore_ZEXT_2r = 243, 261 XCore_ZEXT_rus = 244, 262 XCore_INSTRUCTION_LIST_END = 245 263 }; 264 265 #endif // GET_INSTRINFO_ENUM 266
