1 {imm} only parameter: 2 - is {s} in opcode: {s} == 0, unsigned (8/)16/32 bit immediate 3 {s} == 1, signed 8 bit immediate 4 5 {es:di}: segment register normally %es, can be overwritten 6 edi/di depending on apfx 7 8 {ds:si}: segment register normally %ds, can be overwritten 9 esi/si depending on apfx 10 11 {ax} al/ax/eax depending of dpfx and w 12 13 {dx} (%edx) or (%dx) depending on apfx 14 15 16 {w} 0 = b, 1 = { no dpfx = l, dpfx = w } 17 18 {W} no dpfx = <empty>, dpfx = w 19 {WW} no dpfx = l, dpfx = w 20 21 {R} rep prefix possible 22 {RE} repe or repne prefix possible 23 24 {ccc} CRx registers 25 {ddd} DRx registers 26 27 {gg} 00 = b, 01 = w, 10 = d, 11 = <illegal> 28 {0g} 00 = b, 01 = w, 10 = <illegal>, 11 = <illegal> 29 {GG} 00 = <illegal>, 01 = w, 10 = d, 11 = q 30 {gG} 00 = <illegal>, 01 = w, 10 = d, 11 = <illegal> 31 32 {modr/m} normal registers 33 {MODR/M} MMX registers 34 {ModR/m} XMM registers 35 36 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 37 Special opcodes (prefixes): 38 39 40 01100111:{apfx} 41 01100110:{dpfx} 42 43 00101110:{cs} 44 00111110:{ds} 45 00100110:{es} 46 01100100:{fs} 47 01100101:{gs} 48 49 50 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 51 52 table format 53 54 1bit RE flag 55 1bit R flag 56 16bit mnemonic 57 3bit suffix 58 59 5bit fct 60 2bit string 61 6bit offset1 62 5bit offset2 63 64 4bit fct 65 1bit string 66 6bit offset1 67 4bit offset2 68 69 2bit fct 70 1bit string 71 3bit offset1 72 1bit offset2 73 74 61bit 75
