1 /* 2 * Copyright (C) 2013 Samsung Electronics Co.Ltd 3 * Authors: 4 * Inki Dae <inki.dae (at) samsung.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23 * OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef _FIMG2D_REG_H_ 27 #define _FIMG2D_REG_H_ 28 29 #define SOFT_RESET_REG (0x0000) 30 #define INTEN_REG (0x0004) 31 #define INTC_PEND_REG (0x000C) 32 #define FIFO_STAT_REG (0x0010) 33 #define AXI_MODE_REG (0x001C) 34 #define DMA_SFR_BASE_ADDR_REG (0x0080) 35 #define DMA_COMMAND_REG (0x0084) 36 #define DMA_EXE_LIST_NUM_REG (0x0088) 37 #define DMA_STATUS_REG (0x008C) 38 #define DMA_HOLD_CMD_REG (0x0090) 39 40 /* COMMAND REGISTER */ 41 #define BITBLT_START_REG (0x0100) 42 #define BITBLT_COMMAND_REG (0x0104) 43 #define BLEND_FUNCTION_REG (0x0108) /* VER4.1 */ 44 #define ROUND_MODE_REG (0x010C) /* VER4.1 */ 45 46 /* PARAMETER SETTING REGISTER */ 47 #define ROTATE_REG (0x0200) 48 #define SRC_MASK_DIRECT_REG (0x0204) 49 #define DST_PAT_DIRECT_REG (0x0208) 50 51 /* SOURCE */ 52 #define SRC_SELECT_REG (0x0300) 53 #define SRC_BASE_ADDR_REG (0x0304) 54 #define SRC_STRIDE_REG (0x0308) 55 #define SRC_COLOR_MODE_REG (0x030c) 56 #define SRC_LEFT_TOP_REG (0x0310) 57 #define SRC_RIGHT_BOTTOM_REG (0x0314) 58 #define SRC_PLANE2_BASE_ADDR_REG (0x0318) /* VER4.1 */ 59 #define SRC_REPEAT_MODE_REG (0x031C) 60 #define SRC_PAD_VALUE_REG (0x0320) 61 #define SRC_A8_RGB_EXT_REG (0x0324) 62 #define SRC_SCALE_CTRL_REG (0x0328) 63 #define SRC_XSCALE_REG (0x032C) 64 #define SRC_YSCALE_REG (0x0330) 65 66 /* DESTINATION */ 67 #define DST_SELECT_REG (0x0400) 68 #define DST_BASE_ADDR_REG (0x0404) 69 #define DST_STRIDE_REG (0x0408) 70 #define DST_COLOR_MODE_REG (0x040C) 71 #define DST_LEFT_TOP_REG (0x0410) 72 #define DST_RIGHT_BOTTOM_REG (0x0414) 73 #define DST_PLANE2_BASE_ADDR_REG (0x0418) /* VER4.1 */ 74 #define DST_A8_RGB_EXT_REG (0x041C) 75 76 /* PATTERN */ 77 #define PAT_BASE_ADDR_REG (0x0500) 78 #define PAT_SIZE_REG (0x0504) 79 #define PAT_COLOR_MODE_REG (0x0508) 80 #define PAT_OFFSET_REG (0x050C) 81 #define PAT_STRIDE_REG (0x0510) 82 83 /* MASK */ 84 #define MASK_BASE_ADDR_REG (0x0520) 85 #define MASK_STRIDE_REG (0x0524) 86 #define MASK_LEFT_TOP_REG (0x0528) /* VER4.1 */ 87 #define MASK_RIGHT_BOTTOM_REG (0x052C) /* VER4.1 */ 88 #define MASK_MODE_REG (0x0530) /* VER4.1 */ 89 #define MASK_REPEAT_MODE_REG (0x0534) 90 #define MASK_PAD_VALUE_REG (0x0538) 91 #define MASK_SCALE_CTRL_REG (0x053C) 92 #define MASK_XSCALE_REG (0x0540) 93 #define MASK_YSCALE_REG (0x0544) 94 95 /* CLIPPING WINDOW */ 96 #define CW_LT_REG (0x0600) 97 #define CW_RB_REG (0x0604) 98 99 /* ROP & ALPHA SETTING */ 100 #define THIRD_OPERAND_REG (0x0610) 101 #define ROP4_REG (0x0614) 102 #define ALPHA_REG (0x0618) 103 104 /* COLOR SETTING */ 105 #define FG_COLOR_REG (0x0700) 106 #define BG_COLOR_REG (0x0704) 107 #define BS_COLOR_REG (0x0708) 108 #define SF_COLOR_REG (0x070C) /* VER4.1 */ 109 110 /* COLOR KEY */ 111 #define SRC_COLORKEY_CTRL_REG (0x0710) 112 #define SRC_COLORKEY_DR_MIN_REG (0x0714) 113 #define SRC_COLORKEY_DR_MAX_REG (0x0718) 114 #define DST_COLORKEY_CTRL_REG (0x071C) 115 #define DST_COLORKEY_DR_MIN_REG (0x0720) 116 #define DST_COLORKEY_DR_MAX_REG (0x0724) 117 /* YCbCr src Color Key */ 118 #define YCbCr_SRC_COLORKEY_CTRL_REG (0x0728) /* VER4.1 */ 119 #define YCbCr_SRC_COLORKEY_DR_MIN_REG (0x072C) /* VER4.1 */ 120 #define YCbCr_SRC_COLORKEY_DR_MAX_REG (0x0730) /* VER4.1 */ 121 /*Y CbCr dst Color Key */ 122 #define YCbCr_DST_COLORKEY_CTRL_REG (0x0734) /* VER4.1 */ 123 #define YCbCr_DST_COLORKEY_DR_MIN_REG (0x0738) /* VER4.1 */ 124 #define YCbCr_DST_COLORKEY_DR_MAX_REG (0x073C) /* VER4.1 */ 125 126 #endif 127 128
