1 /****************************************************************************** 2 * 3 * Copyright (C) 2018 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 /*! 21 ****************************************************************************** 22 * \file ihevce_enc_loop_utils.h 23 * 24 * \brief 25 * This file contains interface defination of frame proceswsing pass 26 * 27 * \date 28 * 18/09/2012 29 * 30 * \author 31 * Ittiam 32 * 33 ****************************************************************************** 34 */ 35 36 #ifndef _IHEVCE_ENC_LOOP_UTILS_H_ 37 #define _IHEVCE_ENC_LOOP_UTILS_H_ 38 39 /*****************************************************************************/ 40 /* Constant Macros */ 41 /*****************************************************************************/ 42 #define INTRA_ENC_DBG_L0 1 // Frame Level 43 #define INTRA_ENC_DBG_L1 1 // CTB Row Level 44 #define INTRA_ENC_DBG_L2 0 // CTB/CU Level 45 #define INTRA_ENC_DBG_L3 0 // PU/TU Level 46 #define INTRA_ENC_DBG_L4 0 // Pixel Level 47 /*****************************************************************************/ 48 /* Function Macros */ 49 /*****************************************************************************/ 50 51 #define CABAC_FRAC_BITS_Q_SHIFT (1 << CABAC_FRAC_BITS_Q) 52 #define LAMDA_Q_SHIFT_FACT 20 53 54 #define QUANT_ROUND_FACTOR(out, r1, r0, lambda) \ 55 { \ 56 LWORD64 temp3_m; \ 57 LWORD64 temp; \ 58 temp3_m = (((r1 - r0) * lambda)); \ 59 temp = (CLIP3( \ 60 ((CABAC_FRAC_BITS_Q_SHIFT - \ 61 ((((LWORD64)(temp3_m) + ((LWORD64)CABAC_FRAC_BITS_Q_SHIFT << LAMDA_Q_SHIFT_FACT)) / \ 62 2) >> \ 63 LAMDA_Q_SHIFT_FACT))), \ 64 0, \ 65 (CABAC_FRAC_BITS_Q_SHIFT >> 1))); \ 66 out = ((WORD32)(temp * (1 << QUANT_ROUND_FACTOR_Q))) >> CABAC_FRAC_BITS_Q; \ 67 } 68 69 /*****************************************************************************/ 70 /* Typedefs */ 71 /*****************************************************************************/ 72 73 /*****************************************************************************/ 74 /* Enums */ 75 /*****************************************************************************/ 76 77 /*****************************************************************************/ 78 /* Structure */ 79 /*****************************************************************************/ 80 81 /*****************************************************************************/ 82 /* Extern Variable Declarations */ 83 /*****************************************************************************/ 84 85 /*****************************************************************************/ 86 /* Extern Function Declarations */ 87 /*****************************************************************************/ 88 89 void ihevce_get_cl_cu_lambda_prms(ihevce_enc_loop_ctxt_t *ps_ctxt, WORD32 i4_cur_cu_qp); 90 91 void ihevce_populate_cl_cu_lambda_prms( 92 ihevce_enc_loop_ctxt_t *ps_ctxt, 93 frm_lambda_ctxt_t *ps_frm_lamda, 94 WORD32 i4_slice_type, 95 WORD32 i4_temporal_lyr_id, 96 WORD32 i4_lambda_type); 97 98 void ihevce_compute_quant_rel_param(ihevce_enc_loop_ctxt_t *ps_ctxt, WORD8 i1_cu_qp); 99 100 void ihevce_compute_cu_level_QP( 101 ihevce_enc_loop_ctxt_t *ps_ctxt, 102 WORD32 i4_activity_for_qp, 103 WORD32 i4_activity_for_lamda, 104 WORD32 i4_reduce_qp); 105 106 WORD32 ihevce_scan_coeffs( 107 WORD16 *pi2_quant_coeffs, 108 WORD32 *pi4_subBlock2csbfId_map, 109 WORD32 scan_idx, 110 WORD32 trans_size, 111 UWORD8 *pu1_out_data, 112 UWORD8 *pu1_csbf_buf, 113 WORD32 i4_csbf_stride); 114 115 void ihevce_populate_intra_pred_mode( 116 WORD32 top_intra_mode, 117 WORD32 left_intra_mode, 118 WORD32 available_top, 119 WORD32 available_left, 120 WORD32 cu_pos_y, 121 WORD32 *ps_cand_mode_list); 122 123 void ihevce_intra_pred_mode_signaling( 124 WORD32 top_intra_mode, 125 WORD32 left_intra_mode, 126 WORD32 available_top, 127 WORD32 available_left, 128 WORD32 cu_pos_y, 129 WORD32 luma_intra_pred_mode_current, 130 intra_prev_rem_flags_t *ps_intra_pred_mode_current); 131 void ihevce_chroma_interleave_2d_copy( 132 UWORD8 *pu1_uv_src_bp, 133 WORD32 src_strd, 134 UWORD8 *pu1_uv_dst_bp, 135 WORD32 dst_strd, 136 WORD32 w, 137 WORD32 h, 138 CHROMA_PLANE_ID_T e_chroma_plane); 139 140 WORD32 ihevce_t_q_iq_ssd_scan_fxn( 141 ihevce_enc_loop_ctxt_t *ps_ctxt, 142 UWORD8 *pu1_pred, 143 WORD32 pred_strd, 144 UWORD8 *pu1_src, 145 WORD32 src_strd, 146 WORD16 *pi2_deq_data, 147 WORD32 deq_data_strd, 148 UWORD8 *pu1_recon, 149 WORD32 i4_recon_stride, 150 UWORD8 *pu1_ecd_data, 151 UWORD8 *pu1_csbf_buf, 152 WORD32 csbf_strd, 153 WORD32 trans_size, 154 WORD32 packed_pred_mode, 155 LWORD64 *pi8_cost, 156 WORD32 *pi4_coeff_off, 157 WORD32 *pi4_tu_bits, 158 UWORD32 *pu4_blk_sad, 159 WORD32 *pi4_zero_col, 160 WORD32 *pi4_zero_row, 161 UWORD8 *pu1_is_recon_available, 162 WORD32 i4_perform_rdoq, 163 WORD32 i4_perform_sbh, 164 #if USE_NOISE_TERM_IN_ZERO_CODING_DECISION_ALGORITHMS 165 WORD32 i4_alpha_stim_multiplier, 166 UWORD8 u1_is_cu_noisy, 167 #endif 168 SSD_TYPE_T e_ssd_type, 169 WORD32 early_cbf); 170 171 void ihevce_quant_rounding_factor_gen( 172 WORD32 i4_trans_size, 173 WORD32 is_luma, 174 rdopt_entropy_ctxt_t *ps_rdopt_entropy_ctxt, 175 WORD32 *pi4_quant_round_0_1, 176 WORD32 *pi4_quant_round_1_2, 177 double i4_lamda_modifier, 178 UWORD8 i4_is_tu_level_quant_rounding); 179 180 void ihevce_it_recon_fxn( 181 ihevce_enc_loop_ctxt_t *ps_ctxt, 182 WORD16 *pi2_deq_data, 183 WORD32 deq_dat_strd, 184 UWORD8 *pu1_pred, 185 WORD32 pred_strd, 186 UWORD8 *pu1_recon, 187 WORD32 recon_strd, 188 UWORD8 *pu1_ecd_data, 189 WORD32 trans_size, 190 WORD32 packed_pred_mode, 191 WORD32 cbf, 192 WORD32 zero_cols, 193 WORD32 zero_rows); 194 195 void ihevce_chroma_it_recon_fxn( 196 ihevce_enc_loop_ctxt_t *ps_ctxt, 197 WORD16 *pi2_deq_data, 198 WORD32 deq_dat_strd, 199 UWORD8 *pu1_pred, 200 WORD32 pred_strd, 201 UWORD8 *pu1_recon, 202 WORD32 recon_strd, 203 UWORD8 *pu1_ecd_data, 204 WORD32 trans_size, 205 WORD32 cbf, 206 WORD32 zero_cols, 207 WORD32 zero_rows, 208 CHROMA_PLANE_ID_T e_chroma_plane); 209 210 void ihevce_mpm_idx_based_filter_RDOPT_cand( 211 ihevce_enc_loop_ctxt_t *ps_ctxt, 212 cu_analyse_t *ps_cu_analyse, 213 nbr_4x4_t *ps_left_nbr_4x4, 214 nbr_4x4_t *ps_top_nbr_4x4, 215 UWORD8 *pu1_luma_mode, 216 UWORD8 *pu1_eval_mark); 217 218 LWORD64 ihevce_intra_rdopt_cu_ntu( 219 ihevce_enc_loop_ctxt_t *ps_ctxt, 220 enc_loop_cu_prms_t *ps_cu_prms, 221 void *pv_pred_org, 222 WORD32 pred_strd_org, 223 enc_loop_chrm_cu_buf_prms_t *ps_chrm_cu_buf_prms, 224 UWORD8 *pu1_luma_mode, 225 cu_analyse_t *ps_cu_analyse, 226 void *pv_curr_src, 227 void *pv_cu_left, 228 void *pv_cu_top, 229 void *pv_cu_top_left, 230 nbr_4x4_t *ps_left_nbr_4x4, 231 nbr_4x4_t *ps_top_nbr_4x4, 232 WORD32 nbr_4x4_left_strd, 233 WORD32 cu_left_stride, 234 WORD32 curr_buf_idx, 235 WORD32 func_proc_mode, 236 WORD32 i4_alpha_stim_multiplier); 237 LWORD64 ihevce_inter_rdopt_cu_ntu( 238 ihevce_enc_loop_ctxt_t *ps_ctxt, 239 enc_loop_cu_prms_t *ps_cu_prms, 240 void *pv_src, 241 WORD32 cu_size, 242 WORD32 cu_pos_x, 243 WORD32 cu_pos_y, 244 WORD32 curr_buf_idx, 245 enc_loop_chrm_cu_buf_prms_t *ps_chrm_cu_buf_prms, 246 cu_inter_cand_t *ps_inter_cand, 247 cu_analyse_t *ps_cu_analyse, 248 WORD32 i4_alpha_stim_multiplier); 249 250 LWORD64 ihevce_inter_tu_tree_selector_and_rdopt_cost_computer( 251 ihevce_enc_loop_ctxt_t *ps_ctxt, 252 enc_loop_cu_prms_t *ps_cu_prms, 253 void *pv_src, 254 WORD32 cu_size, 255 WORD32 cu_pos_x, 256 WORD32 cu_pos_y, 257 WORD32 curr_buf_idx, 258 enc_loop_chrm_cu_buf_prms_t *ps_chrm_cu_buf_prms, 259 cu_inter_cand_t *ps_inter_cand, 260 cu_analyse_t *ps_cu_analyse, 261 WORD32 i4_alpha_stim_multiplier); 262 263 LWORD64 ihevce_inter_rdopt_cu_mc_mvp( 264 ihevce_enc_loop_ctxt_t *ps_ctxt, 265 cu_inter_cand_t *ps_inter_cand, 266 WORD32 cu_size, 267 WORD32 cu_pos_x, 268 WORD32 cu_pos_y, 269 nbr_4x4_t *ps_left_nbr_4x4, 270 nbr_4x4_t *ps_top_nbr_4x4, 271 nbr_4x4_t *ps_topleft_nbr_4x4, 272 WORD32 nbr_4x4_left_strd, 273 WORD32 curr_buf_idx); 274 void ihevce_intra_chroma_pred_mode_selector( 275 ihevce_enc_loop_ctxt_t *ps_ctxt, 276 enc_loop_chrm_cu_buf_prms_t *ps_chrm_cu_buf_prms, 277 cu_analyse_t *ps_cu_analyse, 278 WORD32 rd_opt_curr_idx, 279 WORD32 tu_mode, 280 WORD32 i4_alpha_stim_multiplier, 281 UWORD8 u1_is_cu_noisy); 282 283 LWORD64 ihevce_chroma_cu_prcs_rdopt( 284 ihevce_enc_loop_ctxt_t *ps_ctxt, 285 WORD32 rd_opt_curr_idx, 286 WORD32 func_proc_mode, 287 UWORD8 *pu1_chrm_src, 288 WORD32 chrm_src_stride, 289 UWORD8 *pu1_cu_left, 290 UWORD8 *pu1_cu_top, 291 UWORD8 *pu1_cu_top_left, 292 WORD32 cu_left_stride, 293 WORD32 cu_pos_x, 294 WORD32 cu_pos_y, 295 WORD32 *pi4_chrm_tu_bits, 296 WORD32 i4_alpha_stim_multiplier, 297 UWORD8 u1_is_cu_noisy); 298 299 void ihevce_set_eval_flags( 300 ihevce_enc_loop_ctxt_t *ps_ctxt, enc_loop_cu_final_prms_t *ps_enc_loop_bestprms); 301 302 void ihevce_final_rdopt_mode_prcs( 303 ihevce_enc_loop_ctxt_t *ps_ctxt, final_mode_process_prms_t *ps_prms); 304 305 WORD32 ihevce_set_flags_to_regulate_reevaluation( 306 cu_final_recon_flags_t *ps_cu_recon_flags, 307 ihevce_enc_cu_node_ctxt_t *ps_enc_out_ctxt, 308 UWORD8 *pu1_deviant_cu_regions, 309 WORD32 i4_num_deviant_cus, 310 WORD8 i1_qp_past, 311 WORD8 i1_qp_present, 312 UWORD8 u1_is_422); 313 314 void ihevce_err_compute( 315 UWORD8 *pu1_inp, 316 UWORD8 *pu1_interp_out_buf, 317 WORD32 *pi4_sad_grid, 318 WORD32 *pi4_tu_split_flags, 319 WORD32 inp_stride, 320 WORD32 out_stride, 321 WORD32 blk_size, 322 WORD32 part_mask, 323 WORD32 use_satd_for_err_calc); 324 void ihevce_determine_children_cost_of_32x32_cu( 325 block_merge_input_t *ps_merge_in, 326 WORD32 *pi4_cost_children, 327 WORD32 idx_of_tl_child, 328 WORD32 cu_pos_x, 329 WORD32 cu_pos_y); 330 331 WORD32 ihevce_determine_children_cost_of_cu_from_me_results( 332 block_merge_input_t *ps_merge_in, 333 cur_ctb_cu_tree_t *ps_cu_tree_root, 334 WORD32 *pi4_ref_bits, 335 WORD32 *pi4_cost_children, 336 WORD32 idx_of_tl_child, 337 CU_SIZE_T e_cu_size_parent); 338 339 void *ihevce_tu_tree_update( 340 tu_prms_t *ps_tu_prms, 341 WORD32 *pnum_tu_in_cu, 342 WORD32 depth, 343 WORD32 tu_split_flag, 344 WORD32 tu_early_cbf, 345 WORD32 i4_x_off, 346 WORD32 i4_y_off); 347 WORD32 ihevce_shrink_inter_tu_tree( 348 tu_enc_loop_out_t *ps_tu_enc_loop, 349 tu_enc_loop_temp_prms_t *ps_tu_enc_loop_temp_prms, 350 recon_datastore_t *ps_recon_datastore, 351 WORD32 num_tu_in_cu, 352 UWORD8 u1_is_422); 353 UWORD8 ihevce_intra_mode_nxn_hash_updater( 354 UWORD8 *pu1_mode_array, UWORD8 *pu1_hash_table, UWORD8 u1_num_ipe_modes); 355 356 #if ENABLE_TU_TREE_DETERMINATION_IN_RDOPT 357 WORD32 ihevce_determine_tu_tree_distribution( 358 cu_inter_cand_t *ps_cu_data, 359 me_func_selector_t *ps_func_selector, 360 WORD16 *pi2_scratch_mem, 361 UWORD8 *pu1_inp, 362 WORD32 i4_inp_stride, 363 WORD32 i4_lambda, 364 UWORD8 u1_lambda_q_shift, 365 UWORD8 u1_cu_size, 366 UWORD8 u1_max_tr_depth); 367 #endif 368 369 void ihevce_populate_nbr_4x4_with_pu_data( 370 nbr_4x4_t *ps_nbr_4x4, pu_t *ps_pu, WORD32 i4_nbr_buf_stride); 371 372 void ihevce_call_luma_inter_pred_rdopt_pass1( 373 ihevce_enc_loop_ctxt_t *ps_ctxt, cu_inter_cand_t *ps_inter_cand, WORD32 cu_size); 374 375 LWORD64 ihevce_it_recon_ssd( 376 ihevce_enc_loop_ctxt_t *ps_ctxt, 377 UWORD8 *pu1_src, 378 WORD32 i4_src_strd, 379 UWORD8 *pu1_pred, 380 WORD32 i4_pred_strd, 381 WORD16 *pi2_deq_data, 382 WORD32 i4_deq_data_strd, 383 UWORD8 *pu1_recon, 384 WORD32 i4_recon_stride, 385 UWORD8 *pu1_ecd_data, 386 UWORD8 u1_trans_size, 387 UWORD8 u1_pred_mode, 388 WORD32 i4_cbf, 389 WORD32 i4_zero_col, 390 WORD32 i4_zero_row, 391 CHROMA_PLANE_ID_T e_chroma_plane); 392 393 WORD32 ihevce_chroma_t_q_iq_ssd_scan_fxn( 394 ihevce_enc_loop_ctxt_t *ps_ctxt, 395 UWORD8 *pu1_pred, 396 WORD32 pred_strd, 397 UWORD8 *pu1_src, 398 WORD32 src_strd, 399 WORD16 *pi2_deq_data, 400 WORD32 deq_data_strd, 401 UWORD8 *pu1_recon, 402 WORD32 i4_recon_stride, 403 UWORD8 *pu1_ecd_data, 404 UWORD8 *pu1_csbf_buf, 405 WORD32 csbf_strd, 406 WORD32 trans_size, 407 WORD32 i4_scan_idx, 408 WORD32 intra_flag, 409 WORD32 *pi4_coeff_off, 410 WORD32 *pi4_tu_bits, 411 WORD32 *pi4_zero_col, 412 WORD32 *pi4_zero_row, 413 UWORD8 *pu1_is_recon_available, 414 WORD32 i4_perform_sbh, 415 WORD32 i4_perform_rdoq, 416 LWORD64 *pi8_cost, 417 #if USE_NOISE_TERM_IN_ZERO_CODING_DECISION_ALGORITHMS 418 WORD32 i4_alpha_stim_multiplier, 419 UWORD8 u1_is_cu_noisy, 420 #endif 421 UWORD8 u1_is_skip, 422 SSD_TYPE_T e_ssd_type, 423 CHROMA_PLANE_ID_T e_chroma_plane); 424 void ihevce_update_pred_qp(ihevce_enc_loop_ctxt_t *ps_ctxt, WORD32 cu_pos_x, WORD32 cu_pos_y); 425 #endif /* _IHEVCE_ENC_LOOP_UTILS_H_ */ 426
