1 ; 2 ; jfdctint.asm - accurate integer FDCT (64-bit AVX2) 3 ; 4 ; Copyright 2009 Pierre Ossman <ossman (a] cendio.se> for Cendio AB 5 ; Copyright (C) 2009, 2016, 2018, D. R. Commander. 6 ; 7 ; Based on the x86 SIMD extension for IJG JPEG library 8 ; Copyright (C) 1999-2006, MIYASAKA Masaru. 9 ; For conditions of distribution and use, see copyright notice in jsimdext.inc 10 ; 11 ; This file should be assembled with NASM (Netwide Assembler), 12 ; can *not* be assembled with Microsoft's MASM or any compatible 13 ; assembler (including Borland's Turbo Assembler). 14 ; NASM is available from http://nasm.sourceforge.net/ or 15 ; http://sourceforge.net/project/showfiles.php?group_id=6208 16 ; 17 ; This file contains a slow-but-accurate integer implementation of the 18 ; forward DCT (Discrete Cosine Transform). The following code is based 19 ; directly on the IJG's original jfdctint.c; see the jfdctint.c for 20 ; more details. 21 ; 22 ; [TAB8] 23 24 %include "jsimdext.inc" 25 %include "jdct.inc" 26 27 ; -------------------------------------------------------------------------- 28 29 %define CONST_BITS 13 30 %define PASS1_BITS 2 31 32 %define DESCALE_P1 (CONST_BITS - PASS1_BITS) 33 %define DESCALE_P2 (CONST_BITS + PASS1_BITS) 34 35 %if CONST_BITS == 13 36 F_0_298 equ 2446 ; FIX(0.298631336) 37 F_0_390 equ 3196 ; FIX(0.390180644) 38 F_0_541 equ 4433 ; FIX(0.541196100) 39 F_0_765 equ 6270 ; FIX(0.765366865) 40 F_0_899 equ 7373 ; FIX(0.899976223) 41 F_1_175 equ 9633 ; FIX(1.175875602) 42 F_1_501 equ 12299 ; FIX(1.501321110) 43 F_1_847 equ 15137 ; FIX(1.847759065) 44 F_1_961 equ 16069 ; FIX(1.961570560) 45 F_2_053 equ 16819 ; FIX(2.053119869) 46 F_2_562 equ 20995 ; FIX(2.562915447) 47 F_3_072 equ 25172 ; FIX(3.072711026) 48 %else 49 ; NASM cannot do compile-time arithmetic on floating-point constants. 50 %define DESCALE(x, n) (((x) + (1 << ((n) - 1))) >> (n)) 51 F_0_298 equ DESCALE( 320652955, 30 - CONST_BITS) ; FIX(0.298631336) 52 F_0_390 equ DESCALE( 418953276, 30 - CONST_BITS) ; FIX(0.390180644) 53 F_0_541 equ DESCALE( 581104887, 30 - CONST_BITS) ; FIX(0.541196100) 54 F_0_765 equ DESCALE( 821806413, 30 - CONST_BITS) ; FIX(0.765366865) 55 F_0_899 equ DESCALE( 966342111, 30 - CONST_BITS) ; FIX(0.899976223) 56 F_1_175 equ DESCALE(1262586813, 30 - CONST_BITS) ; FIX(1.175875602) 57 F_1_501 equ DESCALE(1612031267, 30 - CONST_BITS) ; FIX(1.501321110) 58 F_1_847 equ DESCALE(1984016188, 30 - CONST_BITS) ; FIX(1.847759065) 59 F_1_961 equ DESCALE(2106220350, 30 - CONST_BITS) ; FIX(1.961570560) 60 F_2_053 equ DESCALE(2204520673, 30 - CONST_BITS) ; FIX(2.053119869) 61 F_2_562 equ DESCALE(2751909506, 30 - CONST_BITS) ; FIX(2.562915447) 62 F_3_072 equ DESCALE(3299298341, 30 - CONST_BITS) ; FIX(3.072711026) 63 %endif 64 65 ; -------------------------------------------------------------------------- 66 ; In-place 8x8x16-bit matrix transpose using AVX2 instructions 67 ; %1-%4: Input/output registers 68 ; %5-%8: Temp registers 69 70 %macro dotranspose 8 71 ; %1=(00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 47) 72 ; %2=(10 11 12 13 14 15 16 17 50 51 52 53 54 55 56 57) 73 ; %3=(20 21 22 23 24 25 26 27 60 61 62 63 64 65 66 67) 74 ; %4=(30 31 32 33 34 35 36 37 70 71 72 73 74 75 76 77) 75 76 vpunpcklwd %5, %1, %2 77 vpunpckhwd %6, %1, %2 78 vpunpcklwd %7, %3, %4 79 vpunpckhwd %8, %3, %4 80 ; transpose coefficients(phase 1) 81 ; %5=(00 10 01 11 02 12 03 13 40 50 41 51 42 52 43 53) 82 ; %6=(04 14 05 15 06 16 07 17 44 54 45 55 46 56 47 57) 83 ; %7=(20 30 21 31 22 32 23 33 60 70 61 71 62 72 63 73) 84 ; %8=(24 34 25 35 26 36 27 37 64 74 65 75 66 76 67 77) 85 86 vpunpckldq %1, %5, %7 87 vpunpckhdq %2, %5, %7 88 vpunpckldq %3, %6, %8 89 vpunpckhdq %4, %6, %8 90 ; transpose coefficients(phase 2) 91 ; %1=(00 10 20 30 01 11 21 31 40 50 60 70 41 51 61 71) 92 ; %2=(02 12 22 32 03 13 23 33 42 52 62 72 43 53 63 73) 93 ; %3=(04 14 24 34 05 15 25 35 44 54 64 74 45 55 65 75) 94 ; %4=(06 16 26 36 07 17 27 37 46 56 66 76 47 57 67 77) 95 96 vpermq %1, %1, 0x8D 97 vpermq %2, %2, 0x8D 98 vpermq %3, %3, 0xD8 99 vpermq %4, %4, 0xD8 100 ; transpose coefficients(phase 3) 101 ; %1=(01 11 21 31 41 51 61 71 00 10 20 30 40 50 60 70) 102 ; %2=(03 13 23 33 43 53 63 73 02 12 22 32 42 52 62 72) 103 ; %3=(04 14 24 34 44 54 64 74 05 15 25 35 45 55 65 75) 104 ; %4=(06 16 26 36 46 56 66 76 07 17 27 37 47 57 67 77) 105 %endmacro 106 107 ; -------------------------------------------------------------------------- 108 ; In-place 8x8x16-bit slow integer forward DCT using AVX2 instructions 109 ; %1-%4: Input/output registers 110 ; %5-%8: Temp registers 111 ; %9: Pass (1 or 2) 112 113 %macro dodct 9 114 vpsubw %5, %1, %4 ; %5=data1_0-data6_7=tmp6_7 115 vpaddw %6, %1, %4 ; %6=data1_0+data6_7=tmp1_0 116 vpaddw %7, %2, %3 ; %7=data3_2+data4_5=tmp3_2 117 vpsubw %8, %2, %3 ; %8=data3_2-data4_5=tmp4_5 118 119 ; -- Even part 120 121 vperm2i128 %6, %6, %6, 0x01 ; %6=tmp0_1 122 vpaddw %1, %6, %7 ; %1=tmp0_1+tmp3_2=tmp10_11 123 vpsubw %6, %6, %7 ; %6=tmp0_1-tmp3_2=tmp13_12 124 125 vperm2i128 %7, %1, %1, 0x01 ; %7=tmp11_10 126 vpsignw %1, %1, [rel PW_1_NEG1] ; %1=tmp10_neg11 127 vpaddw %7, %7, %1 ; %7=(tmp10+tmp11)_(tmp10-tmp11) 128 %if %9 == 1 129 vpsllw %1, %7, PASS1_BITS ; %1=data0_4 130 %else 131 vpaddw %7, %7, [rel PW_DESCALE_P2X] 132 vpsraw %1, %7, PASS1_BITS ; %1=data0_4 133 %endif 134 135 ; (Original) 136 ; z1 = (tmp12 + tmp13) * 0.541196100; 137 ; data2 = z1 + tmp13 * 0.765366865; 138 ; data6 = z1 + tmp12 * -1.847759065; 139 ; 140 ; (This implementation) 141 ; data2 = tmp13 * (0.541196100 + 0.765366865) + tmp12 * 0.541196100; 142 ; data6 = tmp13 * 0.541196100 + tmp12 * (0.541196100 - 1.847759065); 143 144 vperm2i128 %7, %6, %6, 0x01 ; %7=tmp12_13 145 vpunpcklwd %2, %6, %7 146 vpunpckhwd %6, %6, %7 147 vpmaddwd %2, %2, [rel PW_F130_F054_MF130_F054] ; %2=data2_6L 148 vpmaddwd %6, %6, [rel PW_F130_F054_MF130_F054] ; %6=data2_6H 149 150 vpaddd %2, %2, [rel PD_DESCALE_P %+ %9] 151 vpaddd %6, %6, [rel PD_DESCALE_P %+ %9] 152 vpsrad %2, %2, DESCALE_P %+ %9 153 vpsrad %6, %6, DESCALE_P %+ %9 154 155 vpackssdw %3, %2, %6 ; %6=data2_6 156 157 ; -- Odd part 158 159 vpaddw %7, %8, %5 ; %7=tmp4_5+tmp6_7=z3_4 160 161 ; (Original) 162 ; z5 = (z3 + z4) * 1.175875602; 163 ; z3 = z3 * -1.961570560; z4 = z4 * -0.390180644; 164 ; z3 += z5; z4 += z5; 165 ; 166 ; (This implementation) 167 ; z3 = z3 * (1.175875602 - 1.961570560) + z4 * 1.175875602; 168 ; z4 = z3 * 1.175875602 + z4 * (1.175875602 - 0.390180644); 169 170 vperm2i128 %2, %7, %7, 0x01 ; %2=z4_3 171 vpunpcklwd %6, %7, %2 172 vpunpckhwd %7, %7, %2 173 vpmaddwd %6, %6, [rel PW_MF078_F117_F078_F117] ; %6=z3_4L 174 vpmaddwd %7, %7, [rel PW_MF078_F117_F078_F117] ; %7=z3_4H 175 176 ; (Original) 177 ; z1 = tmp4 + tmp7; z2 = tmp5 + tmp6; 178 ; tmp4 = tmp4 * 0.298631336; tmp5 = tmp5 * 2.053119869; 179 ; tmp6 = tmp6 * 3.072711026; tmp7 = tmp7 * 1.501321110; 180 ; z1 = z1 * -0.899976223; z2 = z2 * -2.562915447; 181 ; data7 = tmp4 + z1 + z3; data5 = tmp5 + z2 + z4; 182 ; data3 = tmp6 + z2 + z3; data1 = tmp7 + z1 + z4; 183 ; 184 ; (This implementation) 185 ; tmp4 = tmp4 * (0.298631336 - 0.899976223) + tmp7 * -0.899976223; 186 ; tmp5 = tmp5 * (2.053119869 - 2.562915447) + tmp6 * -2.562915447; 187 ; tmp6 = tmp5 * -2.562915447 + tmp6 * (3.072711026 - 2.562915447); 188 ; tmp7 = tmp4 * -0.899976223 + tmp7 * (1.501321110 - 0.899976223); 189 ; data7 = tmp4 + z3; data5 = tmp5 + z4; 190 ; data3 = tmp6 + z3; data1 = tmp7 + z4; 191 192 vperm2i128 %4, %5, %5, 0x01 ; %4=tmp7_6 193 vpunpcklwd %2, %8, %4 194 vpunpckhwd %4, %8, %4 195 vpmaddwd %2, %2, [rel PW_MF060_MF089_MF050_MF256] ; %2=tmp4_5L 196 vpmaddwd %4, %4, [rel PW_MF060_MF089_MF050_MF256] ; %4=tmp4_5H 197 198 vpaddd %2, %2, %6 ; %2=data7_5L 199 vpaddd %4, %4, %7 ; %4=data7_5H 200 201 vpaddd %2, %2, [rel PD_DESCALE_P %+ %9] 202 vpaddd %4, %4, [rel PD_DESCALE_P %+ %9] 203 vpsrad %2, %2, DESCALE_P %+ %9 204 vpsrad %4, %4, DESCALE_P %+ %9 205 206 vpackssdw %4, %2, %4 ; %4=data7_5 207 208 vperm2i128 %2, %8, %8, 0x01 ; %2=tmp5_4 209 vpunpcklwd %8, %5, %2 210 vpunpckhwd %5, %5, %2 211 vpmaddwd %8, %8, [rel PW_F050_MF256_F060_MF089] ; %8=tmp6_7L 212 vpmaddwd %5, %5, [rel PW_F050_MF256_F060_MF089] ; %5=tmp6_7H 213 214 vpaddd %8, %8, %6 ; %8=data3_1L 215 vpaddd %5, %5, %7 ; %5=data3_1H 216 217 vpaddd %8, %8, [rel PD_DESCALE_P %+ %9] 218 vpaddd %5, %5, [rel PD_DESCALE_P %+ %9] 219 vpsrad %8, %8, DESCALE_P %+ %9 220 vpsrad %5, %5, DESCALE_P %+ %9 221 222 vpackssdw %2, %8, %5 ; %2=data3_1 223 %endmacro 224 225 ; -------------------------------------------------------------------------- 226 SECTION SEG_CONST 227 228 alignz 32 229 GLOBAL_DATA(jconst_fdct_islow_avx2) 230 231 EXTN(jconst_fdct_islow_avx2): 232 233 PW_F130_F054_MF130_F054 times 4 dw (F_0_541 + F_0_765), F_0_541 234 times 4 dw (F_0_541 - F_1_847), F_0_541 235 PW_MF078_F117_F078_F117 times 4 dw (F_1_175 - F_1_961), F_1_175 236 times 4 dw (F_1_175 - F_0_390), F_1_175 237 PW_MF060_MF089_MF050_MF256 times 4 dw (F_0_298 - F_0_899), -F_0_899 238 times 4 dw (F_2_053 - F_2_562), -F_2_562 239 PW_F050_MF256_F060_MF089 times 4 dw (F_3_072 - F_2_562), -F_2_562 240 times 4 dw (F_1_501 - F_0_899), -F_0_899 241 PD_DESCALE_P1 times 8 dd 1 << (DESCALE_P1 - 1) 242 PD_DESCALE_P2 times 8 dd 1 << (DESCALE_P2 - 1) 243 PW_DESCALE_P2X times 16 dw 1 << (PASS1_BITS - 1) 244 PW_1_NEG1 times 8 dw 1 245 times 8 dw -1 246 247 alignz 32 248 249 ; -------------------------------------------------------------------------- 250 SECTION SEG_TEXT 251 BITS 64 252 ; 253 ; Perform the forward DCT on one block of samples. 254 ; 255 ; GLOBAL(void) 256 ; jsimd_fdct_islow_avx2(DCTELEM *data) 257 ; 258 259 ; r10 = DCTELEM *data 260 261 align 32 262 GLOBAL_FUNCTION(jsimd_fdct_islow_avx2) 263 264 EXTN(jsimd_fdct_islow_avx2): 265 push rbp 266 mov rax, rsp 267 mov rbp, rsp 268 collect_args 1 269 270 ; ---- Pass 1: process rows. 271 272 vmovdqu ymm4, YMMWORD [YMMBLOCK(0,0,r10,SIZEOF_DCTELEM)] 273 vmovdqu ymm5, YMMWORD [YMMBLOCK(2,0,r10,SIZEOF_DCTELEM)] 274 vmovdqu ymm6, YMMWORD [YMMBLOCK(4,0,r10,SIZEOF_DCTELEM)] 275 vmovdqu ymm7, YMMWORD [YMMBLOCK(6,0,r10,SIZEOF_DCTELEM)] 276 ; ymm4=(00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17) 277 ; ymm5=(20 21 22 23 24 25 26 27 30 31 32 33 34 35 36 37) 278 ; ymm6=(40 41 42 43 44 45 46 47 50 51 52 53 54 55 56 57) 279 ; ymm7=(60 61 62 63 64 65 66 67 70 71 72 73 74 75 76 77) 280 281 vperm2i128 ymm0, ymm4, ymm6, 0x20 282 vperm2i128 ymm1, ymm4, ymm6, 0x31 283 vperm2i128 ymm2, ymm5, ymm7, 0x20 284 vperm2i128 ymm3, ymm5, ymm7, 0x31 285 ; ymm0=(00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 47) 286 ; ymm1=(10 11 12 13 14 15 16 17 50 51 52 53 54 55 56 57) 287 ; ymm2=(20 21 22 23 24 25 26 27 60 61 62 63 64 65 66 67) 288 ; ymm3=(30 31 32 33 34 35 36 37 70 71 72 73 74 75 76 77) 289 290 dotranspose ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7 291 292 dodct ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7, 1 293 ; ymm0=data0_4, ymm1=data3_1, ymm2=data2_6, ymm3=data7_5 294 295 ; ---- Pass 2: process columns. 296 297 vperm2i128 ymm4, ymm1, ymm3, 0x20 ; ymm4=data3_7 298 vperm2i128 ymm1, ymm1, ymm3, 0x31 ; ymm1=data1_5 299 300 dotranspose ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7 301 302 dodct ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7, 2 303 ; ymm0=data0_4, ymm1=data3_1, ymm2=data2_6, ymm4=data7_5 304 305 vperm2i128 ymm3, ymm0, ymm1, 0x30 ; ymm3=data0_1 306 vperm2i128 ymm5, ymm2, ymm1, 0x20 ; ymm5=data2_3 307 vperm2i128 ymm6, ymm0, ymm4, 0x31 ; ymm6=data4_5 308 vperm2i128 ymm7, ymm2, ymm4, 0x21 ; ymm7=data6_7 309 310 vmovdqu YMMWORD [YMMBLOCK(0,0,r10,SIZEOF_DCTELEM)], ymm3 311 vmovdqu YMMWORD [YMMBLOCK(2,0,r10,SIZEOF_DCTELEM)], ymm5 312 vmovdqu YMMWORD [YMMBLOCK(4,0,r10,SIZEOF_DCTELEM)], ymm6 313 vmovdqu YMMWORD [YMMBLOCK(6,0,r10,SIZEOF_DCTELEM)], ymm7 314 315 vzeroupper 316 uncollect_args 1 317 pop rbp 318 ret 319 320 ; For some reason, the OS X linker does not honor the request to align the 321 ; segment unless we do this. 322 align 32 323
