1 @/****************************************************************************** 2 @ * 3 @ * Copyright (C) 2018 The Android Open Source Project 4 @ * 5 @ * Licensed under the Apache License, Version 2.0 (the "License"); 6 @ * you may not use this file except in compliance with the License. 7 @ * You may obtain a copy of the License at: 8 @ * 9 @ * http://www.apache.org/licenses/LICENSE-2.0 10 @ * 11 @ * Unless required by applicable law or agreed to in writing, software 12 @ * distributed under the License is distributed on an "AS IS" BASIS, 13 @ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 @ * See the License for the specific language governing permissions and 15 @ * limitations under the License. 16 @ * 17 @ ***************************************************************************** 18 @ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 @*/ 20 21 22 .text 23 .p2align 2 24 .extern ixheaacd_radix4bfly 25 .hidden ixheaacd_radix4bfly 26 .extern ixheaacd_postradixcompute2 27 .hidden ixheaacd_postradixcompute2 28 .extern ixheaacd_postradixcompute4 29 .hidden ixheaacd_postradixcompute4 30 31 32 33 34 .extern ixheaacd_sbr_imdct_using_fft 35 .hidden ixheaacd_sbr_imdct_using_fft 36 37 38 .global ixheaacd_cos_sin_mod 39 ixheaacd_cos_sin_mod: 40 STMFD SP!, {R4-R12, R14} 41 42 LDR R5, [R1] 43 MOV R7, R5, ASR #1 44 LDR R4, [R1, #12] 45 MOV R5, R7, ASR #2 46 47 MOV R8, R0 48 MOV R6, R7, LSL #3 49 50 51 SUB R10, SP, #516 52 SUB SP, SP, #516 53 54 AND R12, R10, #7 55 CMP R12, #0 56 ADDNE R10, R10, #4 57 58 59 60 61 62 63 64 STMFD SP!, {R0-R3} 65 66 SUB R6, R6, #4 67 ADD R9, R0, R6 68 69 LDR R2, [R4], #4 70 LDR R1, [R9], #-4 71 LDR R0, [R8], #4 72 ADD R11, R10, R6 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 LOOP1: 90 91 SUBS R5, R5, #1 92 93 SMULWT R12, R1, R2 94 SMULWB R6, R0, R2 95 SMULWT R14, R0, R2 96 97 98 LDR R0, [R8, #0xFC] 99 100 QSUB R12, R12, R6 101 102 SMLAWB R14, R1, R2, R14 103 104 LDR R1, [R9, #0x104] 105 106 STR R12, [R10, #4] 107 STR R14, [R10], #8 108 109 SMULWT R6, R0, R2 110 SMULWB R12, R1, R2 111 SMULWT R14, R1, R2 112 113 LDR R1, [R8], #4 114 115 QSUB R12, R12, R6 116 117 SMLAWB R14, R0, R2, R14 118 119 LDR R2, [R4], #4 120 LDR R0, [R9], #-4 121 122 STR R12, [R10, #0xF8] 123 STR R14, [R10, #0xFC] 124 125 SMULWT R3, R1, R2 126 SMULWB R6, R0, R2 127 SMULWT R12, R0, R2 128 129 LDR R0, [R9, #0x104] 130 131 QSUB R3, R3, R6 132 133 SMLAWB R12, R1, R2, R12 134 135 LDR R1, [R8, #0xFC] 136 137 STR R12, [R11, #-4] 138 STR R3, [R11], #-8 139 140 SMULWT R6, R0, R2 141 SMULWB R14, R1, R2 142 SMULWT R12, R1, R2 143 144 LDR R1, [R9], #-4 145 146 QSUB R14, R14, R6 147 148 SMLAWB R3, R0, R2, R12 149 150 LDR R2, [R4], #4 151 LDR R0, [R8], #4 152 153 STR R3, [R11, #0x108] 154 STR R14, [R11, #0x104] 155 156 SMULWT R12, R1, R2 157 SMULWB R6, R0, R2 158 SMULWT R14, R0, R2 159 160 LDR R0, [R8, #0xFC] 161 162 QSUB R12, R12, R6 163 164 SMLAWB R14, R1, R2, R14 165 166 LDR R1, [R9, #0x104] 167 168 STR R12, [R10, #4] 169 STR R14, [R10], #8 170 171 SMULWT R6, R0, R2 172 SMULWB R12, R1, R2 173 SMULWT R14, R1, R2 174 175 LDR R1, [R8], #4 176 177 QSUB R12, R12, R6 178 179 SMLAWB R14, R0, R2, R14 180 181 LDR R2, [R4], #4 182 LDR R0, [R9], #-4 183 STR R12, [R10, #0xF8] 184 STR R14, [R10, #0xFC] 185 186 SMULWT R3, R1, R2 187 SMULWB R6, R0, R2 188 SMULWT R12, R0, R2 189 190 LDR R0, [R9, #0x104] 191 192 QSUB R3, R3, R6 193 SMLAWB R12, R1, R2, R12 194 195 LDR R1, [R8, #0xFC] 196 STR R3, [R11], #-4 197 STR R12, [R11], #-4 198 199 SMULWT R6, R0, R2 200 SMULWB R3, R1, R2 201 SMULWT R12, R1, R2 202 203 204 LDRGT R1, [R9], #-4 205 206 QSUB R3, R3, R6 207 SMLAWB R12, R0, R2, R12 208 209 210 LDRGT R2, [R4], #4 211 LDRGT R0, [R8], #4 212 213 STR R3, [R11, #0x104] 214 STR R12, [R11, #0x108] 215 216 217 BGT LOOP1 218 LDR R1, [SP, #4] 219 LDR R5, [R1] 220 LDR R4, [SP, #8] 221 LDR R0, [SP, #8] 222 ADD R1, SP, #16 223 224 225 AND R2, R1, #7 226 CMP R2, #0 227 ADDNE R1, R1, #4 228 229 230 CMP R5, #64 231 LDR R5, [SP, #12] 232 MOV R2, #1 233 234 BNE THIRTY2BAND 235 236 237 238 239 240 241 MOV R2, R1 242 MOV R1, #32 243 LDR R3, [SP] 244 STR R5, [SP, #-4]! 245 STR R5, [SP, #-4]! 246 STR R5, [SP, #-4]! 247 STR R5, [SP, #-4]! 248 249 BL ixheaacd_sbr_imdct_using_fft 250 ADD SP, SP, #16 251 252 MOV R0, R4 253 MOV R1, #32 254 ADD R2, SP, #16 255 256 257 AND R6, R2, #7 258 CMP R6, #0 259 ADDNE R2, R2, #4 260 261 262 LDR R3, [SP] 263 ADD R2, R2, #256 264 ADD R3, R3, #256 265 266 STR R5, [SP, #-4]! 267 STR R5, [SP, #-4]! 268 STR R5, [SP, #-4]! 269 STR R5, [SP, #-4]! 270 271 BL ixheaacd_sbr_imdct_using_fft 272 273 ADD SP, SP, #16 274 275 LDR R8, [SP] 276 LDR R12, [SP, #4] 277 MOV R3, #32 278 LDR R6, [R8] 279 LDR R11, [R8, #4] 280 281 ADD R9, R8, #252 282 283 284 B LOOP2_PRO 285 286 THIRTY2BAND: 287 288 289 290 MOV R2, R1 291 MOV R1, #16 292 LDR R3, [SP] 293 294 STR R5, [SP, #-4]! 295 STR R5, [SP, #-4]! 296 STR R5, [SP, #-4]! 297 STR R5, [SP, #-4]! 298 299 BL ixheaacd_sbr_imdct_using_fft 300 ADD SP, SP, #16 301 302 MOV R0, R4 303 MOV R1, #16 304 ADD R2, SP, #16 305 306 307 AND R6, R2, #7 308 CMP R6, #0 309 ADDNE R2, R2, #4 310 311 312 LDR R3, [SP] 313 ADD R2, R2, #256 314 ADD R3, R3, #256 315 316 STR R5, [SP, #-4]! 317 STR R5, [SP, #-4]! 318 STR R5, [SP, #-4]! 319 STR R5, [SP, #-4]! 320 321 BL ixheaacd_sbr_imdct_using_fft 322 323 ADD SP, SP, #16 324 LDR R8, [SP] 325 LDR R12, [SP, #4] 326 LDR R6, [R8] 327 LDR R11, [R8, #4] 328 ADD R9, R8, #124 329 330 331 332 333 LOOP2_PRO: 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 LDR R4, [R12, #20] 353 MOV R6, R6, ASR #1 354 STR R6, [R8], #4 355 LDR R0, [R9] 356 LDR R2, [R4], #4 357 MOV R11, R11, ASR #1 358 LDR R1, [R9, #-4] 359 RSB R12, R11, #0 360 STR R12, [R9], #-4 361 362 SMULWT R14, R1, R2 363 SMULWB R6, R0, R2 364 SMULWT R12, R0, R2 365 366 LDR R0, [R9, #260] 367 QSUB R14, R14, R6 368 SMLAWB R12, R1, R2, R12 369 370 LDR R6, [R8, #252] 371 LDR R11, [R8, #256] 372 STR R14, [R8], #4 373 STR R12, [R9], #-4 374 375 MOV R6, R6, ASR #1 376 MOV R11, R11, ASR #1 377 LDR R1, [R9, #260] 378 379 RSB R6, R6, #0 380 STR R6, [R9, #264] 381 STR R11, [R8, #248] 382 383 SMULWT R12, R0, R2 384 SMULWT R14, R1, R2 385 SMULWB R6, R0, R2 386 SMLAWB R12, R1, R2, R12 387 388 MOV R11, #0 389 QSUB R14, R6, R14 390 QSUB R12, R11, R12 391 LDR R0, [R8, #4] 392 LDR R1, [R8] 393 STR R12, [R8, #252] 394 STR R14, [R9, #260] 395 396 LDR R5, [SP, #4] 397 LDR R5, [R5] 398 MOV R5, R5, ASR #2 399 SUB R5, R5, #2 400 401 402 403 404 405 406 407 LOOP2: 408 SMULWB R12, R0, R2 409 SMULWB R14, R1, R2 410 SMULWT R6, R0, R2 411 SMLAWT R12, R1, R2, R12 412 413 LDR R10, [R9] 414 QSUB R14, R14, R6 415 LDR R0, [R8, #260] 416 LDR R1, [R8, #256] 417 STR R12, [R8], #4 418 STR R14, [R9], #-4 419 420 SMULWB R3, R0, R2 421 SMULWT R6, R0, R2 422 SMULWB R14, R1, R2 423 SMLAWT R3, R1, R2, R3 424 425 LDR R7, [R9, #260] 426 QSUB R6, R6, R14 427 QSUB R3, R11, R3 428 LDR R2, [R4], #4 429 LDR R1, [R9] 430 431 STR R3, [R9, #260] 432 STR R6, [R8, #252] 433 434 SMULWT R12, R10, R2 435 SMULWT R14, R1, R2 436 SMULWB R6, R10, R2 437 SMLAWB R12, R1, R2, R12 438 439 LDR R1, [R9, #256] 440 QSUB R14, R14, R6 441 442 STR R12, [R9], #-4 443 STR R14, [R8], #4 444 445 SUBS R5, R5, #1 446 447 SMULWT R12, R7, R2 448 SMULWT R14, R1, R2 449 SMULWB R6, R7, R2 450 SMLAWB R12, R1, R2, R12 451 452 LDRGE R0, [R8, #4] 453 LDRGE R1, [R8] 454 455 QSUB R12, R11, R12 456 QSUB R14, R6, R14 457 458 STR R12, [R8, #252] 459 STR R14, [R9, #260] 460 461 BGE LOOP2 462 ENDLOOP2: 463 464 ADD SP, SP, #532 465 LDMFD sp!, {r4-r12, r15} 466 467 468 469 470 471 472 473
