1 /****************************************************************************** 2 * * 3 * Copyright (C) 2018 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 #include <stdlib.h> 21 #include <stdio.h> 22 23 #include <ixheaacd_type_def.h> 24 25 #include "ixheaacd_bitbuffer.h" 26 27 #include "ixheaacd_defines.h" 28 #include "ixheaacd_memory_standards.h" 29 #include "ixheaacd_sbrdecsettings.h" 30 #include "ixheaacd_env_extr_part.h" 31 #include <ixheaacd_aac_rom.h> 32 #include "ixheaacd_common_rom.h" 33 #include <ixheaacd_sbr_rom.h> 34 #include "ixheaacd_pulsedata.h" 35 #include "ixheaacd_pns.h" 36 37 #include "ixheaacd_sbr_common.h" 38 #include "ixheaacd_drc_data_struct.h" 39 #include "ixheaacd_drc_dec.h" 40 41 #include "ixheaacd_lt_predict.h" 42 #include "ixheaacd_channelinfo.h" 43 #include "ixheaacd_channel.h" 44 #include "ixheaacd_channelinfo.h" 45 #include "ixheaacd_sbrdecoder.h" 46 #include "ixheaacd_audioobjtypes.h" 47 #include "ixheaacd_latmdemux.h" 48 #include "ixheaacd_aacdec.h" 49 #include "ixheaacd_sbr_common.h" 50 51 #include "ixheaacd_mps_polyphase.h" 52 #include "ixheaacd_config.h" 53 #include "ixheaacd_mps_dec.h" 54 #include "ixheaacd_mps_interface.h" 55 #include "ixheaacd_struct_def.h" 56 57 #include "ixheaacd_config.h" 58 #include "ixheaacd_mps_interface.h" 59 60 #include "ixheaacd_mps_polyphase.h" 61 62 #include "ixheaacd_mps_dec.h" 63 #include "ixheaacd_mps_process.h" 64 #include "ixheaacd_mps_decor.h" 65 #include "ixheaacd_mps_hybfilter.h" 66 #include "ixheaacd_mps_nlc_dec.h" 67 #include "ixheaacd_mps_huff_tab.h" 68 69 #include "math.h" 70 71 #include <assert.h> 72 #include <string.h> 73 74 extern ia_huff_pt0_nodes_struct ixheaacd_huff_part0_nodes; 75 extern ia_huff_ipd_nodes_struct ixheaacd_huff_ipd_nodes; 76 extern ia_huff_lav_nodes_struct ixheaacd_huff_lav_idx_nodes; 77 extern ia_huff_pt0_nodes_struct ixheaacd_huff_pilot_nodes; 78 extern ia_huff_cld_nodes_struct ixheaacd_huff_cld_nodes; 79 extern ia_huff_icc_nodes_struct ixheaacd_huff_icc_nodes; 80 extern ia_huff_res_nodes_struct ixheaacd_huff_reshape_nodes; 81 82 WORD32 ixheaacd_mps_create(ia_mps_dec_state_struct* self, WORD32 bs_frame_len, 83 WORD32 residual_coding, 84 ia_usac_dec_mps_config_struct* mps212_config) { 85 WORD32 num_ch; 86 WORD32 err_code = 0; 87 88 ia_mps_bs_frame bs_frame; 89 90 self->num_parameter_sets = 1; 91 self->qmf_band_count = 64; 92 93 self->res_ch_count = 0; 94 95 if (mps212_config) { 96 self->config = mps212_config; 97 self->frame_length = bs_frame_len; 98 self->in_ch_count = 1; 99 self->out_ch_count = 2; 100 self->residual_coding = residual_coding; 101 if (self->residual_coding) { 102 self->bs_residual_present = 1; 103 self->bs_residual_bands = mps212_config->bs_residual_bands; 104 if (self->config->bs_phase_coding) { 105 self->config->bs_phase_coding = 2; 106 } 107 } 108 } 109 110 err_code = ixheaacd_mps_header_decode(self); 111 112 if (err_code != 0) return err_code; 113 114 if ((self->residual_coding) && (self->res_bands > 0)) self->res_ch_count++; 115 116 ixheaacd_mps_env_init(self); 117 118 ixheaacd_mps_synt_create(&self->poly_phase_filt_kernel, self->qmf_band_count); 119 120 for (num_ch = 0; num_ch < self->out_ch_count; num_ch++) { 121 ixheaacd_mps_synt_init(&self->qmf_filt_state[num_ch]); 122 } 123 124 ixheaacd_mps_qmf_hybrid_analysis_init(&self->hyb_filt_state[0]); 125 126 if ((self->residual_coding) && (self->res_bands > 0)) 127 ixheaacd_mps_qmf_hybrid_analysis_init(&self->hyb_filt_state[1]); 128 129 ixheaacd_mps_decor_init(&(self->mps_decor), self->hyb_band_count, 130 self->config->bs_decorr_config); 131 132 ixheaacd_mps_init_pre_and_post_matrix(self); 133 134 self->parse_nxt_frame = 1; 135 136 bs_frame = self->bs_frame; 137 memset(bs_frame.cld_idx_pre, 0, MAX_PARAMETER_BANDS * sizeof(WORD32)); 138 memset(bs_frame.icc_idx_pre, 0, MAX_PARAMETER_BANDS * sizeof(WORD32)); 139 memset(bs_frame.cmp_cld_idx_prev, 0, MAX_PARAMETER_BANDS * sizeof(WORD32)); 140 memset(bs_frame.cmp_icc_idx_prev, 0, MAX_PARAMETER_BANDS * sizeof(WORD32)); 141 142 self->subband_var.init_flag = 0; 143 self->subband_var.update_old_ener = 0; 144 self->subband_var.nrg_dir = 0; 145 memset(self->subband_var.nrg_diff, 0, 2 * sizeof(FLOAT32)); 146 147 memset(self->opd_smooth.smooth_l_phase, 0, 148 MAX_PARAMETER_BANDS * sizeof(WORD32)); 149 memset(self->opd_smooth.smooth_r_phase, 0, 150 MAX_PARAMETER_BANDS * sizeof(WORD32)); 151 152 return 0; 153 } 154 155 static FLOAT32 ixheaacd_tsd_mul_re[] = { 156 1.0f, 0.707106781186548f, 0.0f, -0.707106781186548f, 157 -1.0f, -0.707106781186548f, 0.0f, 0.707106781186548f}; 158 159 static FLOAT32 ixheaacd_tsd_mul_im[] = { 160 0.0f, 0.707106781186548f, 1.0f, 0.707106781186548f, 161 0.0f, -0.707106781186548f, -1.0f, -0.707106781186548f}; 162 163 VOID ixheaacd_mps_qmf_hyb_analysis(ia_mps_dec_state_struct* self) { 164 ixheaacd_mps_qmf_hybrid_analysis(&self->hyb_filt_state[0], self->qmf_in[0], 165 self->qmf_band_count, self->time_slots, 166 self->hyb_in[0]); 167 168 if ((self->residual_coding) && (self->res_bands > 0)) { 169 ixheaacd_mps_qmf_hybrid_analysis(&self->hyb_filt_state[self->in_ch_count], 170 self->qmf_in[1], self->qmf_band_count, 171 self->time_slots, self->hyb_res); 172 } 173 } 174 175 VOID ixheaacd_mps_qmf_hyb_synthesis(ia_mps_dec_state_struct* self) { 176 WORD32 ch; 177 178 for (ch = 0; ch < self->out_ch_count; ch++) { 179 ixheaacd_mps_qmf_hybrid_synthesis(self->hyb_dir_out[ch], 180 self->qmf_band_count, self->time_slots, 181 self->qmf_out_dir[ch]); 182 } 183 } 184 185 VOID ixheaacd_mps_decor(ia_mps_dec_state_struct* self) { 186 WORD32 k, sb_sample, idx; 187 188 ia_cmplx_flt_struct(*scratch)[MAX_HYBRID_BANDS_MPS]; 189 190 ia_cmplx_flt_struct coeff; 191 WORD32 band_start = 7; 192 193 scratch = self->scratch; 194 195 for (k = self->dir_sig_count; k < self->dir_sig_count + self->decor_sig_count; 196 k++) { 197 if (self->bs_tsd_enable) { 198 for (sb_sample = 0; sb_sample < self->time_slots; sb_sample++) { 199 if (self->bs_tsd_sep_data[sb_sample]) { 200 for (idx = band_start; idx < self->mps_decor.num_bins; idx++) { 201 scratch[sb_sample][idx].re = self->v[k][sb_sample][idx].re; 202 scratch[sb_sample][idx].im = self->v[k][sb_sample][idx].im; 203 self->v[k][sb_sample][idx].re = 0.0f; 204 self->v[k][sb_sample][idx].im = 0.0f; 205 } 206 } 207 } 208 } 209 210 ixheaacd_mps_decor_apply(&self->mps_decor, self->v[k], self->w_diff[k], 211 self->time_slots); 212 213 if (self->bs_tsd_enable) { 214 for (sb_sample = 0; sb_sample < self->time_slots; sb_sample++) { 215 if (self->bs_tsd_sep_data[sb_sample]) { 216 coeff.re = ixheaacd_tsd_mul_re[self->bs_tsd_tr_phase_data[sb_sample]]; 217 coeff.im = ixheaacd_tsd_mul_im[self->bs_tsd_tr_phase_data[sb_sample]]; 218 219 for (idx = band_start; idx < self->mps_decor.num_bins; idx++) { 220 self->w_diff[k][sb_sample][idx].re += 221 coeff.re * scratch[sb_sample][idx].re - 222 coeff.im * scratch[sb_sample][idx].im; 223 self->w_diff[k][sb_sample][idx].im += 224 coeff.im * scratch[sb_sample][idx].re + 225 coeff.re * scratch[sb_sample][idx].im; 226 } 227 } 228 } 229 } 230 } 231 } 232 233 VOID ixheaacd_mps_mix_res_decor(ia_mps_dec_state_struct* self) { 234 WORD32 ts, qs, row, indx; 235 236 for (ts = 0; ts < self->time_slots; ts++) { 237 for (qs = 0; qs < self->hyb_band_count; qs++) { 238 indx = self->hyb_band_to_processing_band_table[qs]; 239 240 for (row = 0; row < self->dir_sig_count; row++) { 241 self->w_dir[row][ts][qs].re = self->v[row][ts][qs].re; 242 self->w_dir[row][ts][qs].im = self->v[row][ts][qs].im; 243 } 244 245 for (row = self->dir_sig_count; 246 row < (self->dir_sig_count + self->decor_sig_count); row++) { 247 if (indx < self->res_bands) { 248 self->w_dir[row][ts][qs].re = self->hyb_res[ts][qs].re; 249 self->w_dir[row][ts][qs].im = self->hyb_res[ts][qs].im; 250 } else { 251 self->w_dir[row][ts][qs].re = 0.0f; 252 self->w_dir[row][ts][qs].im = 0.0f; 253 } 254 } 255 256 for (row = 0; row < self->dir_sig_count; row++) { 257 self->w_diff[row][ts][qs].re = 0.0f; 258 self->w_diff[row][ts][qs].im = 0.0f; 259 } 260 261 for (row = self->dir_sig_count; 262 row < (self->dir_sig_count + self->decor_sig_count); row++) { 263 if (indx < self->res_bands) { 264 self->w_diff[row][ts][qs].re = 0.0f; 265 self->w_diff[row][ts][qs].im = 0.0f; 266 } 267 } 268 } 269 } 270 } 271 272 VOID ixheaacd_mps_create_w(ia_mps_dec_state_struct* self) { 273 ixheaacd_mps_decor(self); 274 ixheaacd_mps_mix_res_decor(self); 275 } 276 WORD32 ixheaacd_mps_apply(ia_mps_dec_state_struct* self, 277 FLOAT32** input_buffer[4], 278 FLOAT32 (*output_buffer)[4096]) { 279 WORD32 ch, ts, qs; 280 WORD32 time_slots = self->time_slots; 281 WORD32 in_ch_count = self->in_ch_count + self->res_ch_count; 282 WORD32 err = 0; 283 284 self->output_buffer = output_buffer; 285 286 assert(self->present_time_slot + time_slots <= self->time_slots); 287 288 for (ts = 0; ts < time_slots; ts++) { 289 for (ch = 0; ch < in_ch_count; ch++) { 290 for (qs = 0; qs < self->qmf_band_count; qs++) { 291 self->qmf_in[ch][self->present_time_slot + ts][qs].re = 292 self->input_gain * input_buffer[2 * ch][ts][qs]; 293 self->qmf_in[ch][self->present_time_slot + ts][qs].im = 294 self->input_gain * input_buffer[2 * ch + 1][ts][qs]; 295 } 296 } 297 } 298 299 self->present_time_slot += time_slots; 300 301 if (self->present_time_slot < self->time_slots) return 0; 302 303 self->present_time_slot = 0; 304 305 err = ixheaacd_mps_frame_decode(self); 306 307 if (err != 0) return err; 308 ixheaacd_mps_qmf_hyb_analysis(self); 309 310 ixheaacd_pre_and_mix_matrix_calculation(self); 311 312 ixheaacd_mps_pre_matrix_mix_matrix_smoothing(self); 313 314 err = ixheaacd_mps_apply_pre_matrix(self); 315 if (err < 0) return err; 316 317 ixheaacd_mps_create_w(self); 318 319 err = ixheaacd_mps_apply_mix_matrix(self); 320 if (err < 0) return err; 321 322 if (self->config->bs_temp_shape_config == 2) { 323 ixheaacd_mps_time_env_shaping(self); 324 } 325 326 err = ixheaacd_mps_temp_process(self); 327 if (err) return err; 328 329 self->parse_nxt_frame = 1; 330 return 0; 331 } 332 333 #define min(a, b) (((a) < (b)) ? (a) : (b)) 334 335 static WORD32 ixheaacd_mps_pcm_decode(ia_handle_bit_buf_struct it_bit_buff, 336 WORD32* out_data_1, WORD32* out_data_2, 337 WORD32 ixheaacd_drc_offset, 338 WORD32 num_val, WORD32 num_levels) { 339 WORD32 i = 0, j = 0, idx = 0; 340 WORD32 max_grp_len = 0, grp_len = 0, next_val = 0, grp_val = 0; 341 UWORD32 data = 0; 342 343 FLOAT32 ld_nlev = 0.f; 344 345 WORD32 pcm_chunk_size[7] = {0}; 346 347 switch (num_levels) { 348 case 3: 349 max_grp_len = 5; 350 break; 351 case 7: 352 max_grp_len = 6; 353 break; 354 case 11: 355 max_grp_len = 2; 356 break; 357 case 13: 358 max_grp_len = 4; 359 break; 360 case 19: 361 max_grp_len = 4; 362 break; 363 case 25: 364 max_grp_len = 3; 365 break; 366 case 51: 367 max_grp_len = 4; 368 break; 369 case 4: 370 case 8: 371 case 15: 372 case 16: 373 case 26: 374 case 31: 375 max_grp_len = 1; 376 break; 377 default: 378 assert(0); 379 } 380 381 ld_nlev = (FLOAT32)(log((FLOAT32)num_levels) / log(2.f)); 382 383 for (i = 1; i <= max_grp_len; i++) { 384 pcm_chunk_size[i] = (WORD32)ceil((FLOAT32)(i)*ld_nlev); 385 } 386 387 for (i = 0; i < num_val; i += max_grp_len) { 388 grp_len = min(max_grp_len, num_val - i); 389 data = ixheaacd_read_bits_buf(it_bit_buff, pcm_chunk_size[grp_len]); 390 391 grp_val = data; 392 393 for (j = 0; j < grp_len; j++) { 394 idx = i + (grp_len - j - 1); 395 next_val = grp_val % num_levels; 396 397 if (out_data_2 == NULL) { 398 out_data_1[idx] = next_val - ixheaacd_drc_offset; 399 } else if (out_data_1 == NULL) { 400 out_data_2[idx] = next_val - ixheaacd_drc_offset; 401 } else { 402 if (idx % 2) { 403 out_data_2[idx / 2] = next_val - ixheaacd_drc_offset; 404 } else { 405 out_data_1[idx / 2] = next_val - ixheaacd_drc_offset; 406 } 407 } 408 409 grp_val = (grp_val - next_val) / num_levels; 410 } 411 } 412 413 return 1; 414 } 415 416 static WORD32 ixheaacd_mps_huff_read(ia_handle_bit_buf_struct it_bit_buff, 417 const WORD32 (*node_tab)[][2], 418 WORD32* out_data) { 419 WORD32 node = 0; 420 UWORD32 next_bit = 0; 421 422 do { 423 next_bit = ixheaacd_read_bits_buf(it_bit_buff, 1); 424 node = (*node_tab)[node][next_bit]; 425 } while (node > 0); 426 427 *out_data = node; 428 429 return 1; 430 } 431 432 static WORD32 ixheaacd_mps_huff_read_2d(ia_handle_bit_buf_struct it_bit_buff, 433 const WORD32 (*node_tab)[][2], 434 WORD32 out_data[2], WORD32* escape) 435 436 { 437 WORD32 huff_2d_8bit = 0; 438 WORD32 node = 0; 439 440 if (!ixheaacd_mps_huff_read(it_bit_buff, node_tab, &node)) return 0; 441 *escape = (node == 0); 442 443 if (*escape) { 444 out_data[0] = 0; 445 out_data[1] = 1; 446 } else { 447 huff_2d_8bit = -(node + 1); 448 out_data[0] = huff_2d_8bit >> 4; 449 out_data[1] = huff_2d_8bit & 0xf; 450 } 451 452 return 1; 453 } 454 455 static WORD32 ixheaacd_mps_sym_restore(ia_handle_bit_buf_struct it_bit_buff, 456 WORD32 lav, WORD32 data[2]) { 457 WORD32 tmp = 0; 458 UWORD32 sym_bit = 0; 459 460 WORD32 sum_val = data[0] + data[1]; 461 WORD32 diff_val = data[0] - data[1]; 462 463 if (sum_val > lav) { 464 data[0] = -sum_val + (2 * lav + 1); 465 data[1] = -diff_val; 466 } else { 467 data[0] = sum_val; 468 data[1] = diff_val; 469 } 470 471 if (data[0] + data[1] != 0) { 472 sym_bit = ixheaacd_read_bits_buf(it_bit_buff, 1); 473 if (sym_bit) { 474 data[0] = -data[0]; 475 data[1] = -data[1]; 476 } 477 } 478 479 if (data[0] - data[1] != 0) { 480 sym_bit = ixheaacd_read_bits_buf(it_bit_buff, 1); 481 if (sym_bit) { 482 tmp = data[0]; 483 data[0] = data[1]; 484 data[1] = tmp; 485 } 486 } 487 488 return 1; 489 } 490 491 static WORD32 ixheaacd_mps_sym_restoreipd(ia_handle_bit_buf_struct it_bit_buff, 492 WORD32 lav, WORD32 data[2]) { 493 WORD32 tmp = 0; 494 UWORD32 sym_bit = 0; 495 496 WORD32 sum_val = data[0] + data[1]; 497 WORD32 diff_val = data[0] - data[1]; 498 499 if (sum_val > lav) { 500 data[0] = -sum_val + (2 * lav + 1); 501 data[1] = -diff_val; 502 } else { 503 data[0] = sum_val; 504 data[1] = diff_val; 505 } 506 507 if (data[0] - data[1] != 0) { 508 sym_bit = ixheaacd_read_bits_buf(it_bit_buff, 1); 509 if (sym_bit) { 510 tmp = data[0]; 511 data[0] = data[1]; 512 data[1] = tmp; 513 } 514 } 515 516 return 1; 517 } 518 519 static WORD32 ixheaacd_mps_huff_dec_pilot(ia_handle_bit_buf_struct it_bit_buff, 520 const WORD32 (*node_tab)[][2], 521 WORD32* pilot_data) { 522 WORD32 node = 0; 523 524 if (!ixheaacd_mps_huff_read(it_bit_buff, node_tab, &node)) return 0; 525 *pilot_data = -(node + 1); 526 527 return 1; 528 } 529 530 static WORD32 ixheaacd_mps_huff_dec_cld_1d( 531 ia_handle_bit_buf_struct it_bit_buff, 532 const ia_huff_cld_node_1d_struct* huff_nodes, WORD32* out_data, 533 WORD32 num_val, WORD32 p0_flag) { 534 WORD32 i = 0, node = 0, ixheaacd_drc_offset = 0; 535 WORD32 od = 0, od_sign = 0; 536 UWORD32 data = 0; 537 538 if (p0_flag) { 539 if (!ixheaacd_mps_huff_read( 540 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.cld, 541 &node)) 542 return 0; 543 out_data[0] = -(node + 1); 544 ixheaacd_drc_offset = 1; 545 } 546 547 for (i = ixheaacd_drc_offset; i < num_val; i++) { 548 if (!ixheaacd_mps_huff_read( 549 it_bit_buff, (ia_huff_node_struct)&huff_nodes->node_tab, &node)) 550 return 0; 551 od = -(node + 1); 552 553 if (od != 0) { 554 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 555 od_sign = data; 556 557 if (od_sign) od = -od; 558 } 559 560 out_data[i] = od; 561 } 562 563 return 1; 564 } 565 566 static WORD32 ixheaacd_mps_huff_dec_ipd_1d( 567 ia_handle_bit_buf_struct it_bit_buff, 568 const ia_huff_ipd_node_1d_struct* huff_nodes, WORD32* out_data, 569 WORD32 num_val, WORD32 p0_flag) { 570 WORD32 i = 0, node = 0, ixheaacd_drc_offset = 0; 571 WORD32 od = 0; 572 573 if (p0_flag) { 574 if (!ixheaacd_mps_huff_read( 575 it_bit_buff, 576 (ia_huff_node_struct)&ixheaacd_huff_ipd_nodes.hp0.node_tab, &node)) 577 return 0; 578 out_data[0] = -(node + 1); 579 ixheaacd_drc_offset = 1; 580 } 581 582 for (i = ixheaacd_drc_offset; i < num_val; i++) { 583 if (!ixheaacd_mps_huff_read( 584 it_bit_buff, (ia_huff_node_struct)&huff_nodes->node_tab, &node)) 585 return 0; 586 od = -(node + 1); 587 out_data[i] = od; 588 } 589 590 return 1; 591 } 592 593 static WORD32 ixheaacd_mps_huff_dec_icc_1d( 594 ia_handle_bit_buf_struct it_bit_buff, 595 const ia_huff_icc_node_1d_struct* huff_nodes, WORD32* out_data, 596 WORD32 num_val, WORD32 p0_flag) { 597 WORD32 i = 0, node = 0, ixheaacd_drc_offset = 0; 598 WORD32 od = 0, od_sign = 0; 599 UWORD32 data = 0; 600 601 if (p0_flag) { 602 if (!ixheaacd_mps_huff_read( 603 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.icc, 604 &node)) 605 return 0; 606 out_data[0] = -(node + 1); 607 ixheaacd_drc_offset = 1; 608 } 609 610 for (i = ixheaacd_drc_offset; i < num_val; i++) { 611 if (!ixheaacd_mps_huff_read( 612 it_bit_buff, (ia_huff_node_struct)&huff_nodes->node_tab, &node)) 613 return 0; 614 od = -(node + 1); 615 616 if (od != 0) { 617 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 618 od_sign = data; 619 620 if (od_sign) od = -od; 621 } 622 623 out_data[i] = od; 624 } 625 626 return 1; 627 } 628 629 static WORD32 ixheaacd_mps_huff_dec_cld_2d( 630 ia_handle_bit_buf_struct it_bit_buff, 631 const ia_huff_cld_node_2d_struct* huff_nodes, WORD32 out_data[][2], 632 WORD32 num_val, WORD32 ch_fac, WORD32* p0_data[2]) { 633 WORD32 i = 0, lav = 0, escape = 0, esc_contrl = 0; 634 WORD32 node = 0; 635 UWORD32 data = 0; 636 637 WORD32 esc_data[MAXBANDS][2] = {{0}}; 638 WORD32 esc_idx[MAXBANDS] = {0}; 639 640 if (!ixheaacd_mps_huff_read( 641 it_bit_buff, 642 (ia_huff_node_struct)&ixheaacd_huff_lav_idx_nodes.node_tab, &node)) 643 return 0; 644 data = -(node + 1); 645 646 lav = 2 * data + 3; 647 648 if (p0_data[0] != NULL) { 649 if (!ixheaacd_mps_huff_read( 650 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.cld, 651 &node)) 652 return 0; 653 *p0_data[0] = -(node + 1); 654 } 655 if (p0_data[1] != NULL) { 656 if (!ixheaacd_mps_huff_read( 657 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.cld, 658 &node)) 659 return 0; 660 *p0_data[1] = -(node + 1); 661 } 662 663 for (i = 0; i < num_val; i += ch_fac) { 664 switch (lav) { 665 case 3: 666 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 667 (ia_huff_node_struct)&huff_nodes->lav3, 668 out_data[i], &escape)) 669 return 0; 670 break; 671 case 5: 672 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 673 (ia_huff_node_struct)&huff_nodes->lav5, 674 out_data[i], &escape)) 675 return 0; 676 break; 677 case 7: 678 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 679 (ia_huff_node_struct)&huff_nodes->lav7, 680 out_data[i], &escape)) 681 return 0; 682 break; 683 case 9: 684 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 685 (ia_huff_node_struct)&huff_nodes->lav9, 686 out_data[i], &escape)) 687 return 0; 688 break; 689 default: 690 break; 691 } 692 693 if (escape) { 694 esc_idx[esc_contrl++] = i; 695 } else { 696 if (!ixheaacd_mps_sym_restore(it_bit_buff, lav, out_data[i])) return 0; 697 } 698 } 699 700 if (esc_contrl > 0) { 701 if (!ixheaacd_mps_pcm_decode(it_bit_buff, esc_data[0], esc_data[1], 0, 702 2 * esc_contrl, (2 * lav + 1))) 703 return 0; 704 705 for (i = 0; i < esc_contrl; i++) { 706 out_data[esc_idx[i]][0] = esc_data[0][i] - lav; 707 out_data[esc_idx[i]][1] = esc_data[1][i] - lav; 708 } 709 } 710 711 return 1; 712 } 713 714 static WORD32 ixheaacd_mps_huff_dec_icc_2d( 715 ia_handle_bit_buf_struct it_bit_buff, 716 const ia_huff_icc_node_2d_struct* huff_nodes, WORD32 out_data[][2], 717 WORD32 num_val, WORD32 ch_fac, WORD32* p0_data[2]) { 718 WORD32 i = 0, lav = 0, escape = 0, esc_contrl = 0; 719 WORD32 node = 0; 720 UWORD32 data = 0; 721 722 WORD32 esc_data[2][MAXBANDS] = {{0}}; 723 WORD32 esc_idx[MAXBANDS] = {0}; 724 725 if (!ixheaacd_mps_huff_read( 726 it_bit_buff, 727 (ia_huff_node_struct)&ixheaacd_huff_lav_idx_nodes.node_tab, &node)) 728 return 0; 729 data = -(node + 1); 730 731 lav = 2 * data + 1; 732 733 if (p0_data[0] != NULL) { 734 if (!ixheaacd_mps_huff_read( 735 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.icc, 736 &node)) 737 return 0; 738 *p0_data[0] = -(node + 1); 739 } 740 if (p0_data[1] != NULL) { 741 if (!ixheaacd_mps_huff_read( 742 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.icc, 743 &node)) 744 return 0; 745 *p0_data[1] = -(node + 1); 746 } 747 748 for (i = 0; i < num_val; i += ch_fac) { 749 switch (lav) { 750 case 1: 751 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 752 (ia_huff_node_struct)&huff_nodes->lav1, 753 out_data[i], &escape)) 754 return 0; 755 break; 756 case 3: 757 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 758 (ia_huff_node_struct)&huff_nodes->lav3, 759 out_data[i], &escape)) 760 return 0; 761 break; 762 case 5: 763 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 764 (ia_huff_node_struct)&huff_nodes->lav5, 765 out_data[i], &escape)) 766 return 0; 767 break; 768 case 7: 769 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 770 (ia_huff_node_struct)&huff_nodes->lav7, 771 out_data[i], &escape)) 772 return 0; 773 break; 774 } 775 776 if (escape) { 777 esc_idx[esc_contrl++] = i; 778 } else { 779 if (!ixheaacd_mps_sym_restore(it_bit_buff, lav, out_data[i])) return 0; 780 } 781 } 782 783 if (esc_contrl > 0) { 784 if (!ixheaacd_mps_pcm_decode(it_bit_buff, esc_data[0], esc_data[1], 0, 785 2 * esc_contrl, (2 * lav + 1))) 786 return 0; 787 788 for (i = 0; i < esc_contrl; i++) { 789 out_data[esc_idx[i]][0] = esc_data[0][i] - lav; 790 out_data[esc_idx[i]][1] = esc_data[1][i] - lav; 791 } 792 } 793 794 return 1; 795 } 796 797 static WORD32 ixheaacd_mps_huff_dec_ipd_2d( 798 ia_handle_bit_buf_struct it_bit_buff, 799 const ia_huff_ipd_node_2d_struct* huff_nodes, WORD32 out_data[][2], 800 WORD32 num_val, WORD32 ch_fac, WORD32* p0_data[2]) { 801 WORD32 i = 0, lav = 0, escape = 0, esc_contrl = 0; 802 WORD32 node = 0; 803 UWORD32 data = 0; 804 805 WORD32 esc_data[2][MAXBANDS] = {{0}}; 806 WORD32 esc_idx[MAXBANDS] = {0}; 807 808 if (!ixheaacd_mps_huff_read( 809 it_bit_buff, 810 (ia_huff_node_struct)&ixheaacd_huff_lav_idx_nodes.node_tab, &node)) 811 return 0; 812 813 data = -(node + 1); 814 if (data == 0) 815 data = 3; 816 else 817 data--; 818 819 lav = 2 * data + 1; 820 821 if (p0_data[0] != NULL) { 822 if (!ixheaacd_mps_huff_read( 823 it_bit_buff, 824 (ia_huff_node_struct)&ixheaacd_huff_ipd_nodes.hp0.node_tab, &node)) 825 return 0; 826 *p0_data[0] = -(node + 1); 827 } 828 if (p0_data[1] != NULL) { 829 if (!ixheaacd_mps_huff_read( 830 it_bit_buff, 831 (ia_huff_node_struct)&ixheaacd_huff_ipd_nodes.hp0.node_tab, &node)) 832 return 0; 833 *p0_data[1] = -(node + 1); 834 } 835 836 for (i = 0; i < num_val; i += ch_fac) { 837 switch (lav) { 838 case 1: 839 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 840 (ia_huff_node_struct)&huff_nodes->lav1, 841 out_data[i], &escape)) 842 return 0; 843 break; 844 case 3: 845 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 846 (ia_huff_node_struct)&huff_nodes->lav3, 847 out_data[i], &escape)) 848 return 0; 849 break; 850 case 5: 851 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 852 (ia_huff_node_struct)&huff_nodes->lav5, 853 out_data[i], &escape)) 854 return 0; 855 break; 856 case 7: 857 if (!ixheaacd_mps_huff_read_2d(it_bit_buff, 858 (ia_huff_node_struct)&huff_nodes->lav7, 859 out_data[i], &escape)) 860 return 0; 861 break; 862 } 863 864 if (escape) { 865 esc_idx[esc_contrl++] = i; 866 } else { 867 if (!ixheaacd_mps_sym_restoreipd(it_bit_buff, lav, out_data[i])) return 0; 868 } 869 } 870 871 if (esc_contrl > 0) { 872 if (!ixheaacd_mps_pcm_decode(it_bit_buff, esc_data[0], esc_data[1], 0, 873 2 * esc_contrl, (2 * lav + 1))) 874 return 0; 875 876 for (i = 0; i < esc_contrl; i++) { 877 out_data[esc_idx[i]][0] = esc_data[0][i] - lav; 878 out_data[esc_idx[i]][1] = esc_data[1][i] - lav; 879 } 880 } 881 882 return 1; 883 } 884 885 static WORD32 ixheaacd_huff_decode(ia_handle_bit_buf_struct it_bit_buff, 886 WORD32* out_data_1, WORD32* out_data_2, 887 WORD32 data_type, WORD32 diff_type_1, 888 WORD32 diff_type_2, WORD32 pilot_coding_flag, 889 WORD32* pilot_data, WORD32 num_val, 890 WORD32* cdg_scheme) { 891 WORD32 diff_type; 892 893 WORD32 i = 0; 894 UWORD32 data = 0; 895 896 WORD32 pair_vec[MAXBANDS][2]; 897 898 WORD32* p0_data_1[2] = {NULL, NULL}; 899 WORD32* p0_data_2[2] = {NULL, NULL}; 900 901 WORD32 p0_flag[2]; 902 903 WORD32 num_val_1_int = num_val; 904 WORD32 num_val_2_int = num_val; 905 906 WORD32* out_data_1_int = out_data_1; 907 WORD32* out_data_2_int = out_data_2; 908 909 WORD32 df_rest_flag_1 = 0; 910 WORD32 df_rest_flag_2 = 0; 911 912 WORD32 huff_yy_1; 913 WORD32 huff_yy_2; 914 WORD32 huff_yy; 915 916 if (pilot_coding_flag) { 917 switch (data_type) { 918 case CLD: 919 if (out_data_1 != NULL) { 920 if (!ixheaacd_mps_huff_dec_pilot( 921 it_bit_buff, 922 (ia_huff_node_struct)&ixheaacd_huff_pilot_nodes.cld, 923 pilot_data)) 924 return 0; 925 } 926 break; 927 928 case ICC: 929 if (out_data_1 != NULL) { 930 if (!ixheaacd_mps_huff_dec_pilot( 931 it_bit_buff, 932 (ia_huff_node_struct)&ixheaacd_huff_pilot_nodes.icc, 933 pilot_data)) 934 return 0; 935 } 936 break; 937 938 default: 939 if (out_data_1 != NULL) { 940 return 0; 941 } 942 break; 943 } 944 } 945 946 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 947 *cdg_scheme = data << PAIR_SHIFT; 948 949 if (*cdg_scheme >> PAIR_SHIFT == HUFF_2D) { 950 if ((out_data_1 != NULL) && (out_data_2 != NULL)) { 951 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 952 *cdg_scheme |= data; 953 } else { 954 *cdg_scheme |= FREQ_PAIR; 955 } 956 } 957 958 if (pilot_coding_flag) { 959 huff_yy_1 = PCM_PLT; 960 huff_yy_2 = PCM_PLT; 961 } else { 962 huff_yy_1 = diff_type_1; 963 huff_yy_2 = diff_type_2; 964 } 965 966 switch (*cdg_scheme >> PAIR_SHIFT) { 967 case HUFF_1D: 968 969 p0_flag[0] = (diff_type_1 == DIFF_FREQ) && !pilot_coding_flag; 970 p0_flag[1] = (diff_type_2 == DIFF_FREQ) && !pilot_coding_flag; 971 972 switch (data_type) { 973 case CLD: 974 if (out_data_1 != NULL) { 975 if (!ixheaacd_mps_huff_dec_cld_1d( 976 it_bit_buff, &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_1], 977 out_data_1, num_val_1_int, p0_flag[0])) 978 return 0; 979 } 980 if (out_data_2 != NULL) { 981 if (!ixheaacd_mps_huff_dec_cld_1d( 982 it_bit_buff, &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_2], 983 out_data_2, num_val_2_int, p0_flag[1])) 984 return 0; 985 } 986 987 break; 988 989 case ICC: 990 if (out_data_1 != NULL) { 991 if (!ixheaacd_mps_huff_dec_icc_1d( 992 it_bit_buff, &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_1], 993 out_data_1, num_val_1_int, p0_flag[0])) 994 return 0; 995 } 996 if (out_data_2 != NULL) { 997 if (!ixheaacd_mps_huff_dec_icc_1d( 998 it_bit_buff, &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_2], 999 out_data_2, num_val_2_int, p0_flag[1])) 1000 return 0; 1001 } 1002 1003 break; 1004 1005 case IPD: 1006 if (out_data_1 != NULL) { 1007 if (!ixheaacd_mps_huff_dec_ipd_1d( 1008 it_bit_buff, &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_1], 1009 out_data_1, num_val_1_int, p0_flag[0])) 1010 return 0; 1011 } 1012 if (out_data_2 != NULL) { 1013 if (!ixheaacd_mps_huff_dec_ipd_1d( 1014 it_bit_buff, &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_2], 1015 out_data_2, num_val_2_int, p0_flag[1])) 1016 return 0; 1017 } 1018 1019 break; 1020 1021 default: 1022 break; 1023 } 1024 1025 break; 1026 1027 case HUFF_2D: 1028 1029 switch (*cdg_scheme & PAIR_MASK) { 1030 case FREQ_PAIR: 1031 1032 if (out_data_1 != NULL) { 1033 if (!pilot_coding_flag && diff_type_1 == DIFF_FREQ) { 1034 p0_data_1[0] = &out_data_1[0]; 1035 p0_data_1[1] = NULL; 1036 1037 num_val_1_int -= 1; 1038 out_data_1_int += 1; 1039 } 1040 df_rest_flag_1 = num_val_1_int % 2; 1041 if (df_rest_flag_1) num_val_1_int -= 1; 1042 } 1043 if (out_data_2 != NULL) { 1044 if (!pilot_coding_flag && diff_type_2 == DIFF_FREQ) { 1045 p0_data_2[0] = NULL; 1046 p0_data_2[1] = &out_data_2[0]; 1047 1048 num_val_2_int -= 1; 1049 out_data_2_int += 1; 1050 } 1051 df_rest_flag_2 = num_val_2_int % 2; 1052 if (df_rest_flag_2) num_val_2_int -= 1; 1053 } 1054 1055 switch (data_type) { 1056 case CLD: 1057 1058 if (out_data_1 != NULL) { 1059 if (!ixheaacd_mps_huff_dec_cld_2d( 1060 it_bit_buff, 1061 &ixheaacd_huff_cld_nodes.h_2_dim[huff_yy_1][FREQ_PAIR], 1062 pair_vec, num_val_1_int, 2, p0_data_1)) 1063 return 0; 1064 if (df_rest_flag_1) { 1065 if (!ixheaacd_mps_huff_dec_cld_1d( 1066 it_bit_buff, 1067 &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_1], 1068 out_data_1_int + num_val_1_int, 1, 0)) 1069 return 0; 1070 } 1071 } 1072 if (out_data_2 != NULL) { 1073 if (!ixheaacd_mps_huff_dec_cld_2d( 1074 it_bit_buff, 1075 &ixheaacd_huff_cld_nodes.h_2_dim[huff_yy_2][FREQ_PAIR], 1076 pair_vec + 1, num_val_2_int, 2, p0_data_2)) 1077 return 0; 1078 if (df_rest_flag_2) { 1079 if (!ixheaacd_mps_huff_dec_cld_1d( 1080 it_bit_buff, 1081 &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_2], 1082 out_data_2_int + num_val_2_int, 1, 0)) 1083 return 0; 1084 } 1085 } 1086 break; 1087 1088 case ICC: 1089 if (out_data_1 != NULL) { 1090 if (!ixheaacd_mps_huff_dec_icc_2d( 1091 it_bit_buff, 1092 &ixheaacd_huff_icc_nodes.h_2_dim[huff_yy_1][FREQ_PAIR], 1093 pair_vec, num_val_1_int, 2, p0_data_1)) 1094 return 0; 1095 if (df_rest_flag_1) { 1096 if (!ixheaacd_mps_huff_dec_icc_1d( 1097 it_bit_buff, 1098 &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_1], 1099 out_data_1_int + num_val_1_int, 1, 0)) 1100 return 0; 1101 } 1102 } 1103 if (out_data_2 != NULL) { 1104 if (!ixheaacd_mps_huff_dec_icc_2d( 1105 it_bit_buff, 1106 &ixheaacd_huff_icc_nodes.h_2_dim[huff_yy_2][FREQ_PAIR], 1107 pair_vec + 1, num_val_2_int, 2, p0_data_2)) 1108 return 0; 1109 if (df_rest_flag_2) { 1110 if (!ixheaacd_mps_huff_dec_icc_1d( 1111 it_bit_buff, 1112 &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_2], 1113 out_data_2_int + num_val_2_int, 1, 0)) 1114 return 0; 1115 } 1116 } 1117 break; 1118 1119 case IPD: 1120 if (out_data_1 != NULL) { 1121 if (!ixheaacd_mps_huff_dec_ipd_2d( 1122 it_bit_buff, 1123 &ixheaacd_huff_ipd_nodes.h_2_dim[huff_yy_1][FREQ_PAIR], 1124 pair_vec, num_val_1_int, 2, p0_data_1)) 1125 return 0; 1126 if (df_rest_flag_1) { 1127 if (!ixheaacd_mps_huff_dec_ipd_1d( 1128 it_bit_buff, 1129 &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_1], 1130 out_data_1_int + num_val_1_int, 1, 0)) 1131 return 0; 1132 } 1133 } 1134 if (out_data_2 != NULL) { 1135 if (!ixheaacd_mps_huff_dec_ipd_2d( 1136 it_bit_buff, 1137 &ixheaacd_huff_ipd_nodes.h_2_dim[huff_yy_2][FREQ_PAIR], 1138 pair_vec + 1, num_val_2_int, 2, p0_data_2)) 1139 return 0; 1140 if (df_rest_flag_2) { 1141 if (!ixheaacd_mps_huff_dec_ipd_1d( 1142 it_bit_buff, 1143 &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_2], 1144 out_data_2_int + num_val_2_int, 1, 0)) 1145 return 0; 1146 } 1147 } 1148 break; 1149 1150 default: 1151 break; 1152 } 1153 1154 if (out_data_1 != NULL) { 1155 for (i = 0; i < num_val_1_int - 1; i += 2) { 1156 out_data_1_int[i] = pair_vec[i][0]; 1157 out_data_1_int[i + 1] = pair_vec[i][1]; 1158 } 1159 } 1160 if (out_data_2 != NULL) { 1161 for (i = 0; i < num_val_2_int - 1; i += 2) { 1162 out_data_2_int[i] = pair_vec[i + 1][0]; 1163 out_data_2_int[i + 1] = pair_vec[i + 1][1]; 1164 } 1165 } 1166 1167 break; 1168 1169 case TIME_PAIR: 1170 1171 if (!pilot_coding_flag && 1172 ((diff_type_1 == DIFF_FREQ) || (diff_type_2 == DIFF_FREQ))) { 1173 p0_data_1[0] = &out_data_1[0]; 1174 p0_data_1[1] = &out_data_2[0]; 1175 1176 out_data_1_int += 1; 1177 out_data_2_int += 1; 1178 1179 num_val_1_int -= 1; 1180 } 1181 1182 if ((diff_type_1 == DIFF_TIME) || (diff_type_2 == DIFF_TIME)) { 1183 diff_type = DIFF_TIME; 1184 } else { 1185 diff_type = DIFF_FREQ; 1186 } 1187 if (pilot_coding_flag) { 1188 huff_yy = PCM_PLT; 1189 } else { 1190 huff_yy = diff_type; 1191 } 1192 1193 switch (data_type) { 1194 case CLD: 1195 if (!ixheaacd_mps_huff_dec_cld_2d( 1196 it_bit_buff, 1197 &ixheaacd_huff_cld_nodes.h_2_dim[huff_yy][TIME_PAIR], 1198 pair_vec, num_val_1_int, 1, p0_data_1)) 1199 return 0; 1200 break; 1201 1202 case ICC: 1203 if (!ixheaacd_mps_huff_dec_icc_2d( 1204 it_bit_buff, 1205 &ixheaacd_huff_icc_nodes.h_2_dim[huff_yy][TIME_PAIR], 1206 pair_vec, num_val_1_int, 1, p0_data_1)) 1207 return 0; 1208 break; 1209 1210 case IPD: 1211 if (!ixheaacd_mps_huff_dec_ipd_2d( 1212 it_bit_buff, 1213 &ixheaacd_huff_ipd_nodes.h_2_dim[huff_yy][TIME_PAIR], 1214 pair_vec, num_val_1_int, 1, p0_data_1)) 1215 return 0; 1216 break; 1217 1218 default: 1219 break; 1220 } 1221 1222 for (i = 0; i < num_val_1_int; i++) { 1223 out_data_1_int[i] = pair_vec[i][0]; 1224 out_data_2_int[i] = pair_vec[i][1]; 1225 } 1226 1227 break; 1228 1229 default: 1230 break; 1231 } 1232 1233 break; 1234 1235 default: 1236 break; 1237 } 1238 1239 return 1; 1240 } 1241 1242 static VOID ixheaacd_diff_freq_decode(WORD32* diff_data, WORD32* out_data, 1243 WORD32 num_val) { 1244 WORD32 i = 0; 1245 1246 out_data[0] = diff_data[0]; 1247 1248 for (i = 1; i < num_val; i++) { 1249 out_data[i] = out_data[i - 1] + diff_data[i]; 1250 } 1251 } 1252 1253 static VOID ixheaacd_mps_diff_time_dec_bwd(WORD32* prev_data, WORD32* diff_data, 1254 WORD32* out_data, 1255 WORD32 mixed_diff_type, 1256 WORD32 num_val) { 1257 WORD32 i = 0; 1258 1259 if (mixed_diff_type) { 1260 out_data[0] = diff_data[0]; 1261 for (i = 1; i < num_val; i++) { 1262 out_data[i] = prev_data[i] + diff_data[i]; 1263 } 1264 } else { 1265 for (i = 0; i < num_val; i++) { 1266 out_data[i] = prev_data[i] + diff_data[i]; 1267 } 1268 } 1269 } 1270 1271 static VOID ixheaacd_mps_diff_time_dec_fwd(WORD32* prev_data, WORD32* diff_data, 1272 WORD32* out_data, 1273 WORD32 mixed_diff_type, 1274 WORD32 num_val) { 1275 WORD32 i = 0; 1276 1277 if (mixed_diff_type) { 1278 out_data[0] = diff_data[0]; 1279 for (i = 1; i < num_val; i++) { 1280 out_data[i] = prev_data[i] - diff_data[i]; 1281 } 1282 } else { 1283 for (i = 0; i < num_val; i++) { 1284 out_data[i] = prev_data[i] - diff_data[i]; 1285 } 1286 } 1287 } 1288 1289 static WORD32 ixheaacd_attach_lsb(ia_handle_bit_buf_struct it_bit_buff, 1290 WORD32* in_data_msb, 1291 WORD32 ixheaacd_drc_offset, WORD32 num_lsb, 1292 WORD32 num_val, WORD32* out_data) { 1293 WORD32 i = 0, lsb = 0, msb = 0; 1294 UWORD32 data = 0; 1295 1296 for (i = 0; i < num_val; i++) { 1297 msb = in_data_msb[i]; 1298 1299 if (num_lsb > 0) { 1300 data = ixheaacd_read_bits_buf(it_bit_buff, num_lsb); 1301 lsb = data; 1302 1303 out_data[i] = ((msb << num_lsb) | lsb) - ixheaacd_drc_offset; 1304 } else 1305 out_data[i] = msb - ixheaacd_drc_offset; 1306 } 1307 1308 return 0; 1309 } 1310 1311 WORD32 ixheaacd_mps_ecdatapairdec(ia_handle_bit_buf_struct it_bit_buff, 1312 WORD32 outdata[][MAXBANDS], 1313 WORD32 history[MAXBANDS], WORD32 data_type, 1314 WORD32 set_idx, WORD32 data_bands, 1315 WORD32 pair_flag, WORD32 coarse_flag, 1316 WORD32 independency_flag) 1317 1318 { 1319 WORD32 diff_time_back_flag = !independency_flag || (set_idx > 0); 1320 WORD32 attach_lsb_flag = 0; 1321 WORD32 pcm_coding_flag = 0; 1322 WORD32 pilot_coding_flag = 0; 1323 WORD32 pilot_data[2] = {0, 0}; 1324 WORD32 mixed_time_pair = 0, pcm_val = 0; 1325 WORD32 quant_levels = 0, quant_offset = 0; 1326 UWORD32 data = 0; 1327 WORD32 band_start = 0; 1328 1329 WORD32 data_pair[2][MAXBANDS] = {{0}}; 1330 WORD32 data_diff[2][MAXBANDS] = {{0}}; 1331 1332 WORD32 msb_state[MAXBANDS] = {0}; 1333 1334 WORD32* data_array[2] = {NULL, NULL}; 1335 1336 WORD32 diff_type[2] = {DIFF_FREQ, DIFF_FREQ}; 1337 WORD32 cdg_scheme = HUFF_1D; 1338 WORD32 direction = BACKWARDS; 1339 1340 switch (data_type) { 1341 case CLD: 1342 if (coarse_flag) { 1343 attach_lsb_flag = 0; 1344 quant_levels = 15; 1345 quant_offset = 7; 1346 } else { 1347 attach_lsb_flag = 0; 1348 quant_levels = 31; 1349 quant_offset = 15; 1350 } 1351 1352 break; 1353 1354 case ICC: 1355 if (coarse_flag) { 1356 attach_lsb_flag = 0; 1357 quant_levels = 4; 1358 quant_offset = 0; 1359 } else { 1360 attach_lsb_flag = 0; 1361 quant_levels = 8; 1362 quant_offset = 0; 1363 } 1364 1365 break; 1366 1367 case IPD: 1368 if (coarse_flag) { 1369 attach_lsb_flag = 0; 1370 quant_levels = 8; 1371 quant_offset = 0; 1372 } else { 1373 attach_lsb_flag = 1; 1374 quant_levels = 16; 1375 quant_offset = 0; 1376 } 1377 break; 1378 1379 default: 1380 fprintf(stderr, "Unknown type of data!\n"); 1381 return 0; 1382 } 1383 1384 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 1385 pcm_coding_flag = data; 1386 1387 pilot_coding_flag = 0; 1388 1389 if (pcm_coding_flag && !pilot_coding_flag) { 1390 if (pair_flag) { 1391 data_array[0] = data_pair[0]; 1392 data_array[1] = data_pair[1]; 1393 pcm_val = 2 * data_bands; 1394 } else { 1395 data_array[0] = data_pair[0]; 1396 data_array[1] = NULL; 1397 pcm_val = data_bands; 1398 } 1399 1400 if (!ixheaacd_mps_pcm_decode(it_bit_buff, data_array[0], data_array[1], 1401 quant_offset, pcm_val, quant_levels)) 1402 return 0; 1403 1404 } else { 1405 if (pair_flag) { 1406 data_array[0] = data_diff[0]; 1407 data_array[1] = data_diff[1]; 1408 } else { 1409 data_array[0] = data_diff[0]; 1410 data_array[1] = NULL; 1411 } 1412 1413 diff_type[0] = DIFF_FREQ; 1414 diff_type[1] = DIFF_FREQ; 1415 1416 direction = BACKWARDS; 1417 1418 if (!pilot_coding_flag) { 1419 if (pair_flag || diff_time_back_flag) { 1420 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 1421 diff_type[0] = data; 1422 } 1423 1424 if (pair_flag && ((diff_type[0] == DIFF_FREQ) || diff_time_back_flag)) { 1425 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 1426 diff_type[1] = data; 1427 } 1428 } 1429 1430 if (data_bands <= 0) return -1; 1431 1432 if (!ixheaacd_huff_decode(it_bit_buff, data_array[0], data_array[1], 1433 data_type, diff_type[0], diff_type[1], 1434 pilot_coding_flag, pilot_data, data_bands, 1435 &cdg_scheme)) { 1436 return 0; 1437 } 1438 1439 if ((diff_type[0] == DIFF_TIME) || (diff_type[1] == DIFF_TIME)) { 1440 if (pair_flag) { 1441 if ((diff_type[0] == DIFF_TIME) && !diff_time_back_flag) { 1442 direction = FORWARDS; 1443 } else if (diff_type[1] == DIFF_TIME) { 1444 direction = BACKWARDS; 1445 } else { 1446 data = ixheaacd_read_bits_buf(it_bit_buff, 1); 1447 direction = data; 1448 } 1449 } else { 1450 direction = BACKWARDS; 1451 } 1452 } 1453 1454 mixed_time_pair = (diff_type[0] != diff_type[1]) && 1455 ((cdg_scheme & PAIR_MASK) == TIME_PAIR); 1456 1457 if (direction == BACKWARDS) { 1458 if (diff_type[0] == DIFF_FREQ) { 1459 ixheaacd_diff_freq_decode(data_diff[0], data_pair[0], data_bands); 1460 } else { 1461 WORD32 i; 1462 for (i = 0; i < data_bands; i++) { 1463 msb_state[i] = history[i + band_start] + quant_offset; 1464 if (attach_lsb_flag) { 1465 msb_state[i] >>= 1; 1466 } 1467 } 1468 ixheaacd_mps_diff_time_dec_bwd(msb_state, data_diff[0], data_pair[0], 1469 mixed_time_pair, data_bands); 1470 } 1471 if (diff_type[1] == DIFF_FREQ) { 1472 ixheaacd_diff_freq_decode(data_diff[1], data_pair[1], data_bands); 1473 } else { 1474 ixheaacd_mps_diff_time_dec_bwd(data_pair[0], data_diff[1], data_pair[1], 1475 mixed_time_pair, data_bands); 1476 } 1477 } else { 1478 ixheaacd_diff_freq_decode(data_diff[1], data_pair[1], data_bands); 1479 1480 if (diff_type[0] == DIFF_FREQ) { 1481 ixheaacd_diff_freq_decode(data_diff[0], data_pair[0], data_bands); 1482 } else { 1483 ixheaacd_mps_diff_time_dec_fwd(data_pair[1], data_diff[0], data_pair[0], 1484 mixed_time_pair, data_bands); 1485 } 1486 } 1487 1488 ixheaacd_attach_lsb(it_bit_buff, data_pair[0], quant_offset, 1489 attach_lsb_flag ? 1 : 0, data_bands, data_pair[0]); 1490 if (pair_flag) { 1491 ixheaacd_attach_lsb(it_bit_buff, data_pair[1], quant_offset, 1492 attach_lsb_flag ? 1 : 0, data_bands, data_pair[1]); 1493 } 1494 } 1495 1496 memcpy(outdata[set_idx] + band_start, data_pair[0], 1497 sizeof(WORD32) * data_bands); 1498 if (pair_flag) { 1499 memcpy(outdata[set_idx + 1] + band_start, data_pair[1], 1500 sizeof(WORD32) * data_bands); 1501 } 1502 1503 return 1; 1504 } 1505 1506 WORD32 ixheaacd_mps_huff_decode(ia_handle_bit_buf_struct it_bit_buff, 1507 WORD32* out_data, WORD32 num_val) { 1508 WORD32 val_rcvd = 0, dummy = 0, i = 0, val = 0, len = 0; 1509 WORD32 rl_data[2] = {0}; 1510 1511 while (val_rcvd < num_val) { 1512 if (!ixheaacd_mps_huff_read_2d( 1513 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_reshape_nodes, 1514 rl_data, &dummy)) 1515 return 0; 1516 val = rl_data[0]; 1517 len = rl_data[1] + 1; 1518 for (i = val_rcvd; i < val_rcvd + len; i++) { 1519 out_data[i] = val; 1520 } 1521 val_rcvd += len; 1522 } 1523 1524 return 1; 1525 } 1526
