1 //=- MicroMips64r6InstrFormats.td - Instruction Formats -*- tablegen -* -=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file describes microMIPS64r6 instruction formats. 11 // 12 //===----------------------------------------------------------------------===// 13 14 class DAUI_FM_MMR6 { 15 bits<5> rt; 16 bits<5> rs; 17 bits<16> imm; 18 19 bits<32> Inst; 20 21 let Inst{31-26} = 0b111100; 22 let Inst{25-21} = rt; 23 let Inst{20-16} = rs; 24 let Inst{15-0} = imm; 25 } 26 27 class POOL32I_ADD_IMM_FM_MMR6<bits<5> funct> { 28 bits<5> rs; 29 bits<16> imm; 30 31 bits<32> Inst; 32 33 let Inst{31-26} = 0b010000; 34 let Inst{25-21} = funct; 35 let Inst{20-16} = rs; 36 let Inst{15-0} = imm; 37 } 38 39 class POOL32S_EXTBITS_FM_MMR6<bits<6> funct> { 40 bits<5> rt; 41 bits<5> rs; 42 bits<5> size; 43 bits<5> pos; 44 45 bits<32> Inst; 46 47 let Inst{31-26} = 0b010110; 48 let Inst{25-21} = rt; 49 let Inst{20-16} = rs; 50 let Inst{15-11} = size; 51 let Inst{10-6} = pos; 52 let Inst{5-0} = funct; 53 } 54 55 class POOL32S_DALIGN_FM_MMR6 { 56 bits<5> rs; 57 bits<5> rt; 58 bits<5> rd; 59 bits<3> bp; 60 61 bits<32> Inst; 62 63 let Inst{31-26} = 0b010110; 64 let Inst{25-21} = rs; 65 let Inst{20-16} = rt; 66 let Inst{15-11} = rd; 67 let Inst{10-8} = bp; 68 let Inst{7-6} = 0b00; 69 let Inst{5-0} = 0b011100; 70 } 71 72 class POOL32A_DIVMOD_FM_MMR6<string instr_asm, bits<9> funct> 73 : MMR6Arch<instr_asm> { 74 bits<5> rt; 75 bits<5> rs; 76 bits<5> rd; 77 78 bits<32> Inst; 79 80 let Inst{31-26} = 0b010110; 81 let Inst{25-21} = rt; 82 let Inst{20-16} = rs; 83 let Inst{15-11} = rd; 84 let Inst{10-9} = 0b00; 85 let Inst{8-0} = funct; 86 } 87 88 class POOL32S_DMFTC0_FM_MMR6<string instr_asm, bits<5> funct> 89 : MMR6Arch<instr_asm>, MipsR6Inst { 90 bits<5> rt; 91 bits<5> rs; 92 bits<3> sel; 93 94 bits<32> Inst; 95 96 let Inst{31-26} = 0b010110; 97 let Inst{25-21} = rt; 98 let Inst{20-16} = rs; 99 let Inst{15-14} = 0; 100 let Inst{13-11} = sel; 101 let Inst{10-6} = funct; 102 let Inst{5-0} = 0b111100; 103 } 104 105 class POOL32S_ARITH_FM_MMR6<string opstr, bits<9> funct> 106 : MMR6Arch<opstr> { 107 bits<5> rt; 108 bits<5> rs; 109 bits<5> rd; 110 111 bits<32> Inst; 112 113 let Inst{31-26} = 0b010110; 114 let Inst{25-21} = rt; 115 let Inst{20-16} = rs; 116 let Inst{15-11} = rd; 117 let Inst{10-9} = 0b00; 118 let Inst{8-0} = funct; 119 } 120 121 class DADDIU_FM_MMR6<string opstr> : MMR6Arch<opstr> { 122 bits<5> rt; 123 bits<5> rs; 124 bits<16> imm16; 125 126 bits<32> Inst; 127 128 let Inst{31-26} = 0b010111; 129 let Inst{25-21} = rt; 130 let Inst{20-16} = rs; 131 let Inst{15-0} = imm16; 132 } 133 134 class PCREL18_FM_MMR6<bits<3> funct> : MipsR6Inst { 135 bits<5> rt; 136 bits<18> imm; 137 138 bits<32> Inst; 139 140 let Inst{31-26} = 0b011110; 141 let Inst{25-21} = rt; 142 let Inst{20-18} = funct; 143 let Inst{17-0} = imm; 144 } 145 146 class POOL32S_2R_FM_MMR6<string instr_asm, bits<10> funct> 147 : MMR6Arch<instr_asm>, MipsR6Inst { 148 bits<5> rt; 149 bits<5> rs; 150 151 bits<32> Inst; 152 153 let Inst{31-26} = 0b010110; 154 let Inst{25-21} = rt; 155 let Inst{20-16} = rs; 156 let Inst{15-6} = funct; 157 let Inst{5-0} = 0b111100; 158 } 159 160 class POOL32S_2RSA5B0_FM_MMR6<string instr_asm, bits<9> funct> 161 : MMR6Arch<instr_asm>, MipsR6Inst { 162 bits<5> rt; 163 bits<5> rs; 164 bits<5> sa; 165 166 bits<32> Inst; 167 168 let Inst{31-26} = 0b010110; 169 let Inst{25-21} = rt; 170 let Inst{20-16} = rs; 171 let Inst{15-11} = sa; 172 let Inst{10-9} = 0b00; 173 let Inst{8-0} = funct; 174 } 175 176 class LD_SD_32_2R_OFFSET16_FM_MMR6<string instr_asm, bits<6> op> 177 : MMR6Arch<instr_asm>, MipsR6Inst { 178 bits<5> rt; 179 bits<21> addr; 180 bits<5> base = addr{20-16}; 181 bits<16> offset = addr{15-0}; 182 183 bits<32> Inst; 184 185 let Inst{31-26} = op; 186 let Inst{25-21} = rt; 187 let Inst{20-16} = base; 188 let Inst{15-0} = offset; 189 } 190 191 class POOL32C_2R_OFFSET12_FM_MMR6<string instr_asm, bits<4> funct> 192 : MMR6Arch<instr_asm>, MipsR6Inst { 193 bits<5> rt; 194 bits<21> addr; 195 bits<5> base = addr{20-16}; 196 bits<12> offset = addr{11-0}; 197 198 bits<32> Inst; 199 200 let Inst{31-26} = 0b011000; 201 let Inst{25-21} = rt; 202 let Inst{20-16} = base; 203 let Inst{15-12} = funct; 204 let Inst{11-0} = offset; 205 } 206 207 class POOL32S_3R_FM_MMR6<string instr_asm, bits<9> funct> 208 : MMR6Arch<instr_asm>, MipsR6Inst { 209 bits<5> rt; 210 bits<5> rs; 211 bits<5> rd; 212 213 bits<32> Inst; 214 215 let Inst{31-26} = 0b010110; 216 let Inst{25-21} = rt; 217 let Inst{20-16} = rs; 218 let Inst{15-11} = rd; 219 let Inst{10-9} = 0b00; 220 let Inst{8-0} = funct; 221 } 222
