1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines an instruction selector for the MIPS target. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsISelDAGToDAG.h" 15 #include "MCTargetDesc/MipsBaseInfo.h" 16 #include "Mips.h" 17 #include "Mips16ISelDAGToDAG.h" 18 #include "MipsMachineFunction.h" 19 #include "MipsRegisterInfo.h" 20 #include "MipsSEISelDAGToDAG.h" 21 #include "llvm/CodeGen/MachineConstantPool.h" 22 #include "llvm/CodeGen/MachineFrameInfo.h" 23 #include "llvm/CodeGen/MachineFunction.h" 24 #include "llvm/CodeGen/MachineInstrBuilder.h" 25 #include "llvm/CodeGen/MachineRegisterInfo.h" 26 #include "llvm/CodeGen/SelectionDAGNodes.h" 27 #include "llvm/IR/CFG.h" 28 #include "llvm/IR/GlobalValue.h" 29 #include "llvm/IR/Instructions.h" 30 #include "llvm/IR/Intrinsics.h" 31 #include "llvm/IR/Type.h" 32 #include "llvm/Support/Debug.h" 33 #include "llvm/Support/ErrorHandling.h" 34 #include "llvm/Support/raw_ostream.h" 35 #include "llvm/Target/TargetMachine.h" 36 using namespace llvm; 37 38 #define DEBUG_TYPE "mips-isel" 39 40 //===----------------------------------------------------------------------===// 41 // Instruction Selector Implementation 42 //===----------------------------------------------------------------------===// 43 44 //===----------------------------------------------------------------------===// 45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine 46 // instructions for SelectionDAG operations. 47 //===----------------------------------------------------------------------===// 48 49 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) { 50 Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget()); 51 bool Ret = SelectionDAGISel::runOnMachineFunction(MF); 52 53 processFunctionAfterISel(MF); 54 55 return Ret; 56 } 57 58 /// getGlobalBaseReg - Output the instructions required to put the 59 /// GOT address into a register. 60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() { 61 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg(); 62 return CurDAG->getRegister(GlobalBaseReg, getTargetLowering()->getPointerTy( 63 CurDAG->getDataLayout())) 64 .getNode(); 65 } 66 67 /// ComplexPattern used on MipsInstrInfo 68 /// Used on Mips Load/Store instructions 69 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base, 70 SDValue &Offset) const { 71 llvm_unreachable("Unimplemented function."); 72 return false; 73 } 74 75 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, 76 SDValue &Offset) const { 77 llvm_unreachable("Unimplemented function."); 78 return false; 79 } 80 81 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, 82 SDValue &Offset) const { 83 llvm_unreachable("Unimplemented function."); 84 return false; 85 } 86 87 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base, 88 SDValue &Offset) const { 89 llvm_unreachable("Unimplemented function."); 90 return false; 91 } 92 93 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base, 94 SDValue &Offset) const { 95 llvm_unreachable("Unimplemented function."); 96 return false; 97 } 98 99 bool MipsDAGToDAGISel::selectIntAddr16MM(SDValue Addr, SDValue &Base, 100 SDValue &Offset) const { 101 llvm_unreachable("Unimplemented function."); 102 return false; 103 } 104 105 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, 106 SDValue &Offset) const { 107 llvm_unreachable("Unimplemented function."); 108 return false; 109 } 110 111 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base, 112 SDValue &Offset) const { 113 llvm_unreachable("Unimplemented function."); 114 return false; 115 } 116 117 bool MipsDAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base, 118 SDValue &Offset) { 119 llvm_unreachable("Unimplemented function."); 120 return false; 121 } 122 123 bool MipsDAGToDAGISel::selectAddr16SP(SDValue Addr, SDValue &Base, 124 SDValue &Offset) { 125 llvm_unreachable("Unimplemented function."); 126 return false; 127 } 128 129 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm, 130 unsigned MinSizeInBits) const { 131 llvm_unreachable("Unimplemented function."); 132 return false; 133 } 134 135 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const { 136 llvm_unreachable("Unimplemented function."); 137 return false; 138 } 139 140 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const { 141 llvm_unreachable("Unimplemented function."); 142 return false; 143 } 144 145 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const { 146 llvm_unreachable("Unimplemented function."); 147 return false; 148 } 149 150 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const { 151 llvm_unreachable("Unimplemented function."); 152 return false; 153 } 154 155 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const { 156 llvm_unreachable("Unimplemented function."); 157 return false; 158 } 159 160 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const { 161 llvm_unreachable("Unimplemented function."); 162 return false; 163 } 164 165 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const { 166 llvm_unreachable("Unimplemented function."); 167 return false; 168 } 169 170 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const { 171 llvm_unreachable("Unimplemented function."); 172 return false; 173 } 174 175 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const { 176 llvm_unreachable("Unimplemented function."); 177 return false; 178 } 179 180 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const { 181 llvm_unreachable("Unimplemented function."); 182 return false; 183 } 184 185 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const { 186 llvm_unreachable("Unimplemented function."); 187 return false; 188 } 189 190 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const { 191 llvm_unreachable("Unimplemented function."); 192 return false; 193 } 194 195 /// Select instructions not customized! Used for 196 /// expanded, promoted and normal instructions 197 void MipsDAGToDAGISel::Select(SDNode *Node) { 198 unsigned Opcode = Node->getOpcode(); 199 200 // Dump information about the Node being selected 201 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n"); 202 203 // If we have a custom node, we already have selected! 204 if (Node->isMachineOpcode()) { 205 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n"); 206 Node->setNodeId(-1); 207 return; 208 } 209 210 // See if subclasses can handle this node. 211 if (trySelect(Node)) 212 return; 213 214 switch(Opcode) { 215 default: break; 216 217 // Get target GOT address. 218 case ISD::GLOBAL_OFFSET_TABLE: 219 ReplaceNode(Node, getGlobalBaseReg()); 220 return; 221 222 #ifndef NDEBUG 223 case ISD::LOAD: 224 case ISD::STORE: 225 assert((Subtarget->systemSupportsUnalignedAccess() || 226 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= 227 cast<MemSDNode>(Node)->getAlignment()) && 228 "Unexpected unaligned loads/stores."); 229 break; 230 #endif 231 } 232 233 // Select the default instruction 234 SelectCode(Node); 235 } 236 237 bool MipsDAGToDAGISel:: 238 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 239 std::vector<SDValue> &OutOps) { 240 // All memory constraints can at least accept raw pointers. 241 switch(ConstraintID) { 242 default: 243 llvm_unreachable("Unexpected asm memory constraint"); 244 case InlineAsm::Constraint_i: 245 case InlineAsm::Constraint_m: 246 case InlineAsm::Constraint_R: 247 case InlineAsm::Constraint_ZC: 248 OutOps.push_back(Op); 249 return false; 250 } 251 return true; 252 } 253
