1 //===-- MipsSchedule.td - Mips Scheduling Definitions ------*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 //===----------------------------------------------------------------------===// 11 // Functional units across Mips chips sets. Based on GCC/Mips backend files. 12 //===----------------------------------------------------------------------===// 13 def ALU : FuncUnit; 14 def IMULDIV : FuncUnit; 15 16 //===----------------------------------------------------------------------===// 17 // Instruction Itinerary classes used for Mips 18 //===----------------------------------------------------------------------===// 19 // IIM16Alu is a placeholder class for most MIPS16 instructions. 20 def IIM16Alu : InstrItinClass; 21 def IIPseudo : InstrItinClass; 22 23 def II_ABS : InstrItinClass; 24 def II_ADDI : InstrItinClass; 25 def II_ADDIU : InstrItinClass; 26 def II_ADDIUPC : InstrItinClass; 27 def II_ADD : InstrItinClass; 28 def II_ADDU : InstrItinClass; 29 def II_ADD_D : InstrItinClass; 30 def II_ADD_S : InstrItinClass; 31 def II_ALIGN : InstrItinClass; 32 def II_AND : InstrItinClass; 33 def II_ANDI : InstrItinClass; 34 def II_ALUIPC : InstrItinClass; 35 def II_AUI : InstrItinClass; 36 def II_AUIPC : InstrItinClass; 37 def II_B : InstrItinClass; 38 def II_BADDU : InstrItinClass; 39 def II_BBIT : InstrItinClass; // bbit[01], bbit[01]32 40 def II_BALC : InstrItinClass; 41 def II_BC : InstrItinClass; 42 def II_BC1F : InstrItinClass; 43 def II_BC1FL : InstrItinClass; 44 def II_BC1T : InstrItinClass; 45 def II_BC1TL : InstrItinClass; 46 def II_BC1CCZ : InstrItinClass; 47 def II_BCC : InstrItinClass; // beq and bne 48 def II_BCCZ : InstrItinClass; // b[gl][et]z 49 def II_BCCC : InstrItinClass; // b<cc>c 50 def II_BCCZAL : InstrItinClass; // bgezal and bltzal 51 def II_BCCZALS : InstrItinClass; // bgezals and bltzals 52 def II_BCCZC : InstrItinClass; // beqzc, bnezc 53 def II_BITSWAP : InstrItinClass; 54 def II_CEIL : InstrItinClass; 55 def II_CFC1 : InstrItinClass; 56 def II_CLO : InstrItinClass; 57 def II_CLZ : InstrItinClass; 58 def II_CTC1 : InstrItinClass; 59 def II_CVT : InstrItinClass; 60 def II_C_CC_D : InstrItinClass; // Any c.<cc>.d instruction 61 def II_C_CC_S : InstrItinClass; // Any c.<cc>.s instruction 62 def II_DADDIU : InstrItinClass; 63 def II_DADDU : InstrItinClass; 64 def II_DADDI : InstrItinClass; 65 def II_DADD : InstrItinClass; 66 def II_DAHI : InstrItinClass; 67 def II_DATI : InstrItinClass; 68 def II_DAUI : InstrItinClass; 69 def II_DALIGN : InstrItinClass; 70 def II_DBITSWAP : InstrItinClass; 71 def II_DCLO : InstrItinClass; 72 def II_DCLZ : InstrItinClass; 73 def II_DDIV : InstrItinClass; 74 def II_DDIVU : InstrItinClass; 75 def II_DIV : InstrItinClass; 76 def II_DIVU : InstrItinClass; 77 def II_DIV_D : InstrItinClass; 78 def II_DIV_S : InstrItinClass; 79 def II_DMFC0 : InstrItinClass; 80 def II_DMTC0 : InstrItinClass; 81 def II_DMFC1 : InstrItinClass; 82 def II_DMTC1 : InstrItinClass; 83 def II_DMOD : InstrItinClass; 84 def II_DMODU : InstrItinClass; 85 def II_DMUH : InstrItinClass; 86 def II_DMUHU : InstrItinClass; 87 def II_DMFC2 : InstrItinClass; 88 def II_DMTC2 : InstrItinClass; 89 def II_DMUL : InstrItinClass; 90 def II_DMULU : InstrItinClass; 91 def II_DMULT : InstrItinClass; 92 def II_DMULTU : InstrItinClass; 93 def II_DROTR : InstrItinClass; 94 def II_DROTR32 : InstrItinClass; 95 def II_DROTRV : InstrItinClass; 96 def II_DSLL : InstrItinClass; 97 def II_DSLL32 : InstrItinClass; 98 def II_DSLLV : InstrItinClass; 99 def II_DSRA : InstrItinClass; 100 def II_DSRA32 : InstrItinClass; 101 def II_DSRAV : InstrItinClass; 102 def II_DSRL : InstrItinClass; 103 def II_DSRL32 : InstrItinClass; 104 def II_DSRLV : InstrItinClass; 105 def II_DSBH : InstrItinClass; 106 def II_DSHD : InstrItinClass; 107 def II_DSUBU : InstrItinClass; 108 def II_DSUB : InstrItinClass; 109 def II_EXT : InstrItinClass; // Any EXT instruction 110 def II_FLOOR : InstrItinClass; 111 def II_INS : InstrItinClass; // Any INS instruction 112 def II_IndirectBranchPseudo : InstrItinClass; // Indirect branch pseudo. 113 def II_J : InstrItinClass; 114 def II_JAL : InstrItinClass; 115 def II_JALR : InstrItinClass; 116 def II_JALR_HB : InstrItinClass; 117 def II_JALRC : InstrItinClass; 118 def II_JALRS : InstrItinClass; 119 def II_JALS : InstrItinClass; 120 def II_JIC : InstrItinClass; 121 def II_JIALC : InstrItinClass; 122 def II_JR : InstrItinClass; 123 def II_JR_HB : InstrItinClass; 124 def II_JRADDIUSP : InstrItinClass; 125 def II_JRC : InstrItinClass; 126 def II_ReturnPseudo : InstrItinClass; // Return pseudo. 127 def II_ERET : InstrItinClass; 128 def II_DERET : InstrItinClass; 129 def II_ERETNC : InstrItinClass; 130 def II_EHB : InstrItinClass; 131 def II_SDBBP : InstrItinClass; 132 def II_SSNOP : InstrItinClass; 133 def II_SYSCALL : InstrItinClass; 134 def II_PAUSE : InstrItinClass; 135 def II_WAIT : InstrItinClass; 136 def II_EI : InstrItinClass; 137 def II_DI : InstrItinClass; 138 def II_TEQ : InstrItinClass; 139 def II_TEQI : InstrItinClass; 140 def II_TGE : InstrItinClass; 141 def II_TGEI : InstrItinClass; 142 def II_TGEIU : InstrItinClass; 143 def II_TGEU : InstrItinClass; 144 def II_TNE : InstrItinClass; 145 def II_TNEI : InstrItinClass; 146 def II_TLT : InstrItinClass; 147 def II_TLTI : InstrItinClass; 148 def II_TLTU : InstrItinClass; 149 def II_TTLTIU : InstrItinClass; 150 def II_TLBP : InstrItinClass; 151 def II_TLBR : InstrItinClass; 152 def II_TLBWI : InstrItinClass; 153 def II_TLBWR : InstrItinClass; 154 def II_TRAP : InstrItinClass; 155 def II_BREAK : InstrItinClass; 156 def II_SYNC : InstrItinClass; 157 def II_SYNCI : InstrItinClass; 158 def II_LB : InstrItinClass; 159 def II_LBE : InstrItinClass; 160 def II_LBU : InstrItinClass; 161 def II_LBUE : InstrItinClass; 162 def II_LD : InstrItinClass; 163 def II_LDC1 : InstrItinClass; 164 def II_LDC2 : InstrItinClass; 165 def II_LDC3 : InstrItinClass; 166 def II_LDL : InstrItinClass; 167 def II_LDR : InstrItinClass; 168 def II_LDPC : InstrItinClass; 169 def II_LDXC1 : InstrItinClass; 170 def II_LH : InstrItinClass; 171 def II_LHE : InstrItinClass; 172 def II_LHU : InstrItinClass; 173 def II_LHUE : InstrItinClass; 174 def II_LL : InstrItinClass; 175 def II_LLD : InstrItinClass; 176 def II_LUI : InstrItinClass; 177 def II_LUXC1 : InstrItinClass; 178 def II_LW : InstrItinClass; 179 def II_LWE : InstrItinClass; 180 def II_LWC1 : InstrItinClass; 181 def II_LWC2 : InstrItinClass; 182 def II_LWC3 : InstrItinClass; 183 def II_LWL : InstrItinClass; 184 def II_LWLE : InstrItinClass; 185 def II_LWPC : InstrItinClass; 186 def II_LWR : InstrItinClass; 187 def II_LWRE : InstrItinClass; 188 def II_LWU : InstrItinClass; 189 def II_LWUPC : InstrItinClass; 190 def II_LWXC1 : InstrItinClass; 191 def II_LSA : InstrItinClass; 192 def II_DLSA : InstrItinClass; 193 def II_MADD : InstrItinClass; 194 def II_MADDU : InstrItinClass; 195 def II_MADD_D : InstrItinClass; 196 def II_MADD_S : InstrItinClass; 197 def II_MADDF_D : InstrItinClass; 198 def II_MADDF_S : InstrItinClass; 199 def II_MFC0 : InstrItinClass; 200 def II_MFC1 : InstrItinClass; 201 def II_MFHC1 : InstrItinClass; 202 def II_MFC2 : InstrItinClass; 203 def II_MFHI_MFLO : InstrItinClass; // mfhi and mflo 204 def II_MOD : InstrItinClass; 205 def II_MODU : InstrItinClass; 206 def II_MOVF : InstrItinClass; 207 def II_MOVF_D : InstrItinClass; 208 def II_MOVF_S : InstrItinClass; 209 def II_MOVN : InstrItinClass; 210 def II_MOVN_D : InstrItinClass; 211 def II_MOVN_S : InstrItinClass; 212 def II_MOVT : InstrItinClass; 213 def II_MOVT_D : InstrItinClass; 214 def II_MOVT_S : InstrItinClass; 215 def II_MOVZ : InstrItinClass; 216 def II_MOVZ_D : InstrItinClass; 217 def II_MOVZ_S : InstrItinClass; 218 def II_MOV_D : InstrItinClass; 219 def II_MOV_S : InstrItinClass; 220 def II_MSUB : InstrItinClass; 221 def II_MSUBU : InstrItinClass; 222 def II_MSUB_D : InstrItinClass; 223 def II_MSUB_S : InstrItinClass; 224 def II_MSUBF_D : InstrItinClass; 225 def II_MSUBF_S : InstrItinClass; 226 def II_MTC0 : InstrItinClass; 227 def II_MTC1 : InstrItinClass; 228 def II_MTHC1 : InstrItinClass; 229 def II_MTC2 : InstrItinClass; 230 def II_MTHI_MTLO : InstrItinClass; // mthi and mtlo 231 def II_MUL : InstrItinClass; 232 def II_MUH : InstrItinClass; 233 def II_MUHU : InstrItinClass; 234 def II_MULU : InstrItinClass; 235 def II_MULT : InstrItinClass; 236 def II_MULTU : InstrItinClass; 237 def II_MUL_D : InstrItinClass; 238 def II_MUL_S : InstrItinClass; 239 def II_NEG : InstrItinClass; 240 def II_NMADD_D : InstrItinClass; 241 def II_NMADD_S : InstrItinClass; 242 def II_NMSUB_D : InstrItinClass; 243 def II_NMSUB_S : InstrItinClass; 244 def II_NOR : InstrItinClass; 245 def II_OR : InstrItinClass; 246 def II_ORI : InstrItinClass; 247 def II_POP : InstrItinClass; 248 def II_RDHWR : InstrItinClass; 249 def II_RESTORE : InstrItinClass; 250 def II_ROTR : InstrItinClass; 251 def II_ROTRV : InstrItinClass; 252 def II_ROUND : InstrItinClass; 253 def II_SAVE : InstrItinClass; 254 def II_SC : InstrItinClass; 255 def II_SCD : InstrItinClass; 256 def II_SB : InstrItinClass; 257 def II_SBE : InstrItinClass; 258 def II_SD : InstrItinClass; 259 def II_SDC1 : InstrItinClass; 260 def II_SDC2 : InstrItinClass; 261 def II_SDC3 : InstrItinClass; 262 def II_SDL : InstrItinClass; 263 def II_SDR : InstrItinClass; 264 def II_SDXC1 : InstrItinClass; 265 def II_SEB : InstrItinClass; 266 def II_SEH : InstrItinClass; 267 def II_SELCCZ : InstrItinClass; 268 def II_SEQ_SNE : InstrItinClass; // seq and sne 269 def II_SEQI_SNEI : InstrItinClass; // seqi and snei 270 def II_SH : InstrItinClass; 271 def II_SHE : InstrItinClass; 272 def II_SLL : InstrItinClass; 273 def II_SLLV : InstrItinClass; 274 def II_SLTI_SLTIU : InstrItinClass; // slti and sltiu 275 def II_SLT_SLTU : InstrItinClass; // slt and sltu 276 def II_SQRT_D : InstrItinClass; 277 def II_SQRT_S : InstrItinClass; 278 def II_SRA : InstrItinClass; 279 def II_SRAV : InstrItinClass; 280 def II_SRL : InstrItinClass; 281 def II_SRLV : InstrItinClass; 282 def II_SUB : InstrItinClass; 283 def II_SUBU : InstrItinClass; 284 def II_SUB_D : InstrItinClass; 285 def II_SUB_S : InstrItinClass; 286 def II_SUXC1 : InstrItinClass; 287 def II_SW : InstrItinClass; 288 def II_SWE : InstrItinClass; 289 def II_SWC1 : InstrItinClass; 290 def II_SWC2 : InstrItinClass; 291 def II_SWC3 : InstrItinClass; 292 def II_SWL : InstrItinClass; 293 def II_SWLE : InstrItinClass; 294 def II_SWR : InstrItinClass; 295 def II_SWRE : InstrItinClass; 296 def II_SWXC1 : InstrItinClass; 297 def II_TRUNC : InstrItinClass; 298 def II_WSBH : InstrItinClass; 299 def II_XOR : InstrItinClass; 300 def II_XORI : InstrItinClass; 301 def II_CACHE : InstrItinClass; 302 def II_PREF : InstrItinClass; 303 def II_CACHEE : InstrItinClass; 304 def II_PREFE : InstrItinClass; 305 def II_LLE : InstrItinClass; 306 def II_SCE : InstrItinClass; 307 def II_TLBINV : InstrItinClass; 308 def II_TLBINVF : InstrItinClass; 309 310 //===----------------------------------------------------------------------===// 311 // Mips Generic instruction itineraries. 312 //===----------------------------------------------------------------------===// 313 def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ 314 InstrItinData<IIM16Alu , [InstrStage<1, [ALU]>]>, 315 InstrItinData<II_ADDI , [InstrStage<1, [ALU]>]>, 316 InstrItinData<II_ADDIU , [InstrStage<1, [ALU]>]>, 317 InstrItinData<II_ADDIUPC , [InstrStage<1, [ALU]>]>, 318 InstrItinData<II_ADD , [InstrStage<1, [ALU]>]>, 319 InstrItinData<II_ADDU , [InstrStage<1, [ALU]>]>, 320 InstrItinData<II_AUI , [InstrStage<1, [ALU]>]>, 321 InstrItinData<II_AND , [InstrStage<1, [ALU]>]>, 322 InstrItinData<II_ALUIPC , [InstrStage<1, [ALU]>]>, 323 InstrItinData<II_AUIPC , [InstrStage<1, [ALU]>]>, 324 InstrItinData<II_ALIGN , [InstrStage<1, [ALU]>]>, 325 InstrItinData<II_BADDU , [InstrStage<1, [ALU]>]>, 326 InstrItinData<II_BITSWAP , [InstrStage<1, [ALU]>]>, 327 InstrItinData<II_SLL , [InstrStage<1, [ALU]>]>, 328 InstrItinData<II_SRA , [InstrStage<1, [ALU]>]>, 329 InstrItinData<II_SRL , [InstrStage<1, [ALU]>]>, 330 InstrItinData<II_ROTR , [InstrStage<1, [ALU]>]>, 331 InstrItinData<II_SLLV , [InstrStage<1, [ALU]>]>, 332 InstrItinData<II_SRAV , [InstrStage<1, [ALU]>]>, 333 InstrItinData<II_SRLV , [InstrStage<1, [ALU]>]>, 334 InstrItinData<II_ROTRV , [InstrStage<1, [ALU]>]>, 335 InstrItinData<II_CLO , [InstrStage<1, [ALU]>]>, 336 InstrItinData<II_CLZ , [InstrStage<1, [ALU]>]>, 337 InstrItinData<II_DADDIU , [InstrStage<1, [ALU]>]>, 338 InstrItinData<II_DADDU , [InstrStage<1, [ALU]>]>, 339 InstrItinData<II_DADDI , [InstrStage<1, [ALU]>]>, 340 InstrItinData<II_DADD , [InstrStage<1, [ALU]>]>, 341 InstrItinData<II_DALIGN , [InstrStage<1, [ALU]>]>, 342 InstrItinData<II_DAHI , [InstrStage<1, [ALU]>]>, 343 InstrItinData<II_DATI , [InstrStage<1, [ALU]>]>, 344 InstrItinData<II_DAUI , [InstrStage<1, [ALU]>]>, 345 InstrItinData<II_DBITSWAP , [InstrStage<1, [ALU]>]>, 346 InstrItinData<II_DCLO , [InstrStage<1, [ALU]>]>, 347 InstrItinData<II_DCLZ , [InstrStage<1, [ALU]>]>, 348 InstrItinData<II_DMOD , [InstrStage<17, [IMULDIV]>]>, 349 InstrItinData<II_DMODU , [InstrStage<17, [IMULDIV]>]>, 350 InstrItinData<II_DSLL , [InstrStage<1, [ALU]>]>, 351 InstrItinData<II_DSLL32 , [InstrStage<1, [ALU]>]>, 352 InstrItinData<II_DSRL , [InstrStage<1, [ALU]>]>, 353 InstrItinData<II_DSRL32 , [InstrStage<1, [ALU]>]>, 354 InstrItinData<II_DSRA , [InstrStage<1, [ALU]>]>, 355 InstrItinData<II_DSRA32 , [InstrStage<1, [ALU]>]>, 356 InstrItinData<II_DSLLV , [InstrStage<1, [ALU]>]>, 357 InstrItinData<II_DSRLV , [InstrStage<1, [ALU]>]>, 358 InstrItinData<II_DSRAV , [InstrStage<1, [ALU]>]>, 359 InstrItinData<II_DSUBU , [InstrStage<1, [ALU]>]>, 360 InstrItinData<II_DSUB , [InstrStage<1, [ALU]>]>, 361 InstrItinData<II_DROTR , [InstrStage<1, [ALU]>]>, 362 InstrItinData<II_DROTR32 , [InstrStage<1, [ALU]>]>, 363 InstrItinData<II_DROTRV , [InstrStage<1, [ALU]>]>, 364 InstrItinData<II_DSBH , [InstrStage<1, [ALU]>]>, 365 InstrItinData<II_DSHD , [InstrStage<1, [ALU]>]>, 366 InstrItinData<II_DCLO , [InstrStage<1, [ALU]>]>, 367 InstrItinData<II_DCLZ , [InstrStage<1, [ALU]>]>, 368 InstrItinData<II_EXT , [InstrStage<1, [ALU]>]>, 369 InstrItinData<II_INS , [InstrStage<1, [ALU]>]>, 370 InstrItinData<II_LUI , [InstrStage<1, [ALU]>]>, 371 InstrItinData<II_MOVF , [InstrStage<1, [ALU]>]>, 372 InstrItinData<II_MOVN , [InstrStage<1, [ALU]>]>, 373 InstrItinData<II_MOVN_S , [InstrStage<1, [ALU]>]>, 374 InstrItinData<II_MOVN_D , [InstrStage<1, [ALU]>]>, 375 InstrItinData<II_MOVT , [InstrStage<1, [ALU]>]>, 376 InstrItinData<II_MOVZ , [InstrStage<1, [ALU]>]>, 377 InstrItinData<II_NOR , [InstrStage<1, [ALU]>]>, 378 InstrItinData<II_OR , [InstrStage<1, [ALU]>]>, 379 InstrItinData<II_POP , [InstrStage<1, [ALU]>]>, 380 InstrItinData<II_RDHWR , [InstrStage<1, [ALU]>]>, 381 InstrItinData<II_SUB , [InstrStage<1, [ALU]>]>, 382 InstrItinData<II_SUBU , [InstrStage<1, [ALU]>]>, 383 InstrItinData<II_XOR , [InstrStage<1, [ALU]>]>, 384 InstrItinData<II_ANDI , [InstrStage<1, [ALU]>]>, 385 InstrItinData<II_ORI , [InstrStage<1, [ALU]>]>, 386 InstrItinData<II_XORI , [InstrStage<1, [ALU]>]>, 387 InstrItinData<II_LB , [InstrStage<3, [ALU]>]>, 388 InstrItinData<II_LBE , [InstrStage<3, [ALU]>]>, 389 InstrItinData<II_LBU , [InstrStage<3, [ALU]>]>, 390 InstrItinData<II_LBUE , [InstrStage<3, [ALU]>]>, 391 InstrItinData<II_LH , [InstrStage<3, [ALU]>]>, 392 InstrItinData<II_LHU , [InstrStage<3, [ALU]>]>, 393 InstrItinData<II_LHUE , [InstrStage<3, [ALU]>]>, 394 InstrItinData<II_LW , [InstrStage<3, [ALU]>]>, 395 InstrItinData<II_LWPC , [InstrStage<3, [ALU]>]>, 396 InstrItinData<II_LWL , [InstrStage<3, [ALU]>]>, 397 InstrItinData<II_LWLE , [InstrStage<3, [ALU]>]>, 398 InstrItinData<II_LWR , [InstrStage<3, [ALU]>]>, 399 InstrItinData<II_LWRE , [InstrStage<3, [ALU]>]>, 400 InstrItinData<II_LWUPC , [InstrStage<3, [ALU]>]>, 401 InstrItinData<II_LD , [InstrStage<3, [ALU]>]>, 402 InstrItinData<II_LDL , [InstrStage<3, [ALU]>]>, 403 InstrItinData<II_LDR , [InstrStage<3, [ALU]>]>, 404 InstrItinData<II_LDPC , [InstrStage<3, [ALU]>]>, 405 InstrItinData<II_LL , [InstrStage<3, [ALU]>]>, 406 InstrItinData<II_LLD , [InstrStage<3, [ALU]>]>, 407 InstrItinData<II_RESTORE , [InstrStage<3, [ALU]>]>, 408 InstrItinData<II_SB , [InstrStage<1, [ALU]>]>, 409 InstrItinData<II_SH , [InstrStage<1, [ALU]>]>, 410 InstrItinData<II_SHE , [InstrStage<1, [ALU]>]>, 411 InstrItinData<II_SW , [InstrStage<1, [ALU]>]>, 412 InstrItinData<II_SWL , [InstrStage<1, [ALU]>]>, 413 InstrItinData<II_SWR , [InstrStage<1, [ALU]>]>, 414 InstrItinData<II_SDL , [InstrStage<1, [ALU]>]>, 415 InstrItinData<II_SDR , [InstrStage<1, [ALU]>]>, 416 InstrItinData<II_SD , [InstrStage<1, [ALU]>]>, 417 InstrItinData<II_SC , [InstrStage<1, [ALU]>]>, 418 InstrItinData<II_SCD , [InstrStage<1, [ALU]>]>, 419 InstrItinData<II_SAVE , [InstrStage<1, [ALU]>]>, 420 InstrItinData<II_SELCCZ , [InstrStage<1, [ALU]>]>, 421 InstrItinData<II_SEQ_SNE , [InstrStage<1, [ALU]>]>, 422 InstrItinData<II_SEQI_SNEI , [InstrStage<1, [ALU]>]>, 423 InstrItinData<II_SLTI_SLTIU , [InstrStage<1, [ALU]>]>, 424 InstrItinData<II_SLT_SLTU , [InstrStage<1, [ALU]>]>, 425 InstrItinData<II_B , [InstrStage<1, [ALU]>]>, 426 InstrItinData<II_BALC , [InstrStage<1, [ALU]>]>, 427 InstrItinData<II_BBIT , [InstrStage<1, [ALU]>]>, 428 InstrItinData<II_BC , [InstrStage<1, [ALU]>]>, 429 InstrItinData<II_BC1F , [InstrStage<1, [ALU]>]>, 430 InstrItinData<II_BC1FL , [InstrStage<1, [ALU]>]>, 431 InstrItinData<II_BC1T , [InstrStage<1, [ALU]>]>, 432 InstrItinData<II_BC1TL , [InstrStage<1, [ALU]>]>, 433 InstrItinData<II_BC1CCZ , [InstrStage<1, [ALU]>]>, 434 InstrItinData<II_BCC , [InstrStage<1, [ALU]>]>, 435 InstrItinData<II_BCCC , [InstrStage<1, [ALU]>]>, 436 InstrItinData<II_BCCZ , [InstrStage<1, [ALU]>]>, 437 InstrItinData<II_BCCZAL , [InstrStage<1, [ALU]>]>, 438 InstrItinData<II_BCCZALS , [InstrStage<1, [ALU]>]>, 439 InstrItinData<II_BCCZC , [InstrStage<1, [ALU]>]>, 440 InstrItinData<II_IndirectBranchPseudo, [InstrStage<1, [ALU]>]>, 441 InstrItinData<II_J , [InstrStage<1, [ALU]>]>, 442 InstrItinData<II_JAL , [InstrStage<1, [ALU]>]>, 443 InstrItinData<II_JALR , [InstrStage<1, [ALU]>]>, 444 InstrItinData<II_JALR_HB , [InstrStage<1, [ALU]>]>, 445 InstrItinData<II_JALRC , [InstrStage<1, [ALU]>]>, 446 InstrItinData<II_JALRS , [InstrStage<1, [ALU]>]>, 447 InstrItinData<II_JALS , [InstrStage<1, [ALU]>]>, 448 InstrItinData<II_JIC , [InstrStage<1, [ALU]>]>, 449 InstrItinData<II_JIALC , [InstrStage<1, [ALU]>]>, 450 InstrItinData<II_JR , [InstrStage<1, [ALU]>]>, 451 InstrItinData<II_JR_HB , [InstrStage<1, [ALU]>]>, 452 InstrItinData<II_JRADDIUSP , [InstrStage<1, [ALU]>]>, 453 InstrItinData<II_JRC , [InstrStage<1, [ALU]>]>, 454 InstrItinData<II_ReturnPseudo , [InstrStage<1, [ALU]>]>, 455 InstrItinData<IIPseudo , [InstrStage<1, [ALU]>]>, 456 InstrItinData<II_DMUH , [InstrStage<17, [IMULDIV]>]>, 457 InstrItinData<II_DMUHU , [InstrStage<17, [IMULDIV]>]>, 458 InstrItinData<II_ERET , [InstrStage<1, [ALU]>]>, 459 InstrItinData<II_DERET , [InstrStage<1, [ALU]>]>, 460 InstrItinData<II_ERETNC , [InstrStage<1, [ALU]>]>, 461 InstrItinData<II_EHB , [InstrStage<1, [ALU]>]>, 462 InstrItinData<II_SDBBP , [InstrStage<1, [ALU]>]>, 463 InstrItinData<II_SSNOP , [InstrStage<1, [ALU]>]>, 464 InstrItinData<II_SYSCALL , [InstrStage<1, [ALU]>]>, 465 InstrItinData<II_PAUSE , [InstrStage<1, [ALU]>]>, 466 InstrItinData<II_WAIT , [InstrStage<1, [ALU]>]>, 467 InstrItinData<II_EI , [InstrStage<1, [ALU]>]>, 468 InstrItinData<II_DI , [InstrStage<1, [ALU]>]>, 469 InstrItinData<II_TEQ , [InstrStage<1, [ALU]>]>, 470 InstrItinData<II_TEQI , [InstrStage<1, [ALU]>]>, 471 InstrItinData<II_TGE , [InstrStage<1, [ALU]>]>, 472 InstrItinData<II_TGEI , [InstrStage<1, [ALU]>]>, 473 InstrItinData<II_TGEIU , [InstrStage<1, [ALU]>]>, 474 InstrItinData<II_TGEU , [InstrStage<1, [ALU]>]>, 475 InstrItinData<II_TNE , [InstrStage<1, [ALU]>]>, 476 InstrItinData<II_TNEI , [InstrStage<1, [ALU]>]>, 477 InstrItinData<II_TLT , [InstrStage<1, [ALU]>]>, 478 InstrItinData<II_TLTI , [InstrStage<1, [ALU]>]>, 479 InstrItinData<II_TLTU , [InstrStage<1, [ALU]>]>, 480 InstrItinData<II_TTLTIU , [InstrStage<1, [ALU]>]>, 481 InstrItinData<II_TLBP , [InstrStage<1, [ALU]>]>, 482 InstrItinData<II_TLBR , [InstrStage<1, [ALU]>]>, 483 InstrItinData<II_TLBWI , [InstrStage<1, [ALU]>]>, 484 InstrItinData<II_TLBWR , [InstrStage<1, [ALU]>]>, 485 InstrItinData<II_TRAP , [InstrStage<1, [ALU]>]>, 486 InstrItinData<II_BREAK , [InstrStage<1, [ALU]>]>, 487 InstrItinData<II_SYNC , [InstrStage<1, [ALU]>]>, 488 InstrItinData<II_SYNCI , [InstrStage<1, [ALU]>]>, 489 InstrItinData<II_DMUL , [InstrStage<17, [IMULDIV]>]>, 490 InstrItinData<II_DMULT , [InstrStage<17, [IMULDIV]>]>, 491 InstrItinData<II_DMULTU , [InstrStage<17, [IMULDIV]>]>, 492 InstrItinData<II_DMULU , [InstrStage<17, [IMULDIV]>]>, 493 InstrItinData<II_MADD , [InstrStage<17, [IMULDIV]>]>, 494 InstrItinData<II_MADDU , [InstrStage<17, [IMULDIV]>]>, 495 InstrItinData<II_MFHI_MFLO , [InstrStage<1, [IMULDIV]>]>, 496 InstrItinData<II_MOD , [InstrStage<38, [IMULDIV]>]>, 497 InstrItinData<II_MODU , [InstrStage<38, [IMULDIV]>]>, 498 InstrItinData<II_MSUB , [InstrStage<17, [IMULDIV]>]>, 499 InstrItinData<II_MSUBU , [InstrStage<17, [IMULDIV]>]>, 500 InstrItinData<II_MTHI_MTLO , [InstrStage<1, [IMULDIV]>]>, 501 InstrItinData<II_MUH , [InstrStage<17, [IMULDIV]>]>, 502 InstrItinData<II_MUHU , [InstrStage<17, [IMULDIV]>]>, 503 InstrItinData<II_MUL , [InstrStage<17, [IMULDIV]>]>, 504 InstrItinData<II_MULT , [InstrStage<17, [IMULDIV]>]>, 505 InstrItinData<II_MULTU , [InstrStage<17, [IMULDIV]>]>, 506 InstrItinData<II_MULU , [InstrStage<17, [IMULDIV]>]>, 507 InstrItinData<II_MSUB , [InstrStage<17, [IMULDIV]>]>, 508 InstrItinData<II_MSUBU , [InstrStage<17, [IMULDIV]>]>, 509 InstrItinData<II_DIV , [InstrStage<38, [IMULDIV]>]>, 510 InstrItinData<II_DIVU , [InstrStage<38, [IMULDIV]>]>, 511 InstrItinData<II_DDIV , [InstrStage<38, [IMULDIV]>]>, 512 InstrItinData<II_DDIVU , [InstrStage<38, [IMULDIV]>]>, 513 InstrItinData<II_CEIL , [InstrStage<1, [ALU]>]>, 514 InstrItinData<II_CVT , [InstrStage<1, [ALU]>]>, 515 InstrItinData<II_ABS , [InstrStage<1, [ALU]>]>, 516 InstrItinData<II_FLOOR , [InstrStage<1, [ALU]>]>, 517 InstrItinData<II_NEG , [InstrStage<1, [ALU]>]>, 518 InstrItinData<II_ROUND , [InstrStage<1, [ALU]>]>, 519 InstrItinData<II_TRUNC , [InstrStage<1, [ALU]>]>, 520 InstrItinData<II_MOV_D , [InstrStage<2, [ALU]>]>, 521 InstrItinData<II_MOV_S , [InstrStage<2, [ALU]>]>, 522 InstrItinData<II_CFC1 , [InstrStage<2, [ALU]>]>, 523 InstrItinData<II_CTC1 , [InstrStage<2, [ALU]>]>, 524 InstrItinData<II_MOVF_D , [InstrStage<2, [ALU]>]>, 525 InstrItinData<II_MOVF_S , [InstrStage<2, [ALU]>]>, 526 InstrItinData<II_MOVT_D , [InstrStage<2, [ALU]>]>, 527 InstrItinData<II_MOVT_S , [InstrStage<2, [ALU]>]>, 528 InstrItinData<II_MOVZ_D , [InstrStage<2, [ALU]>]>, 529 InstrItinData<II_MOVZ_S , [InstrStage<2, [ALU]>]>, 530 InstrItinData<II_C_CC_S , [InstrStage<3, [ALU]>]>, 531 InstrItinData<II_C_CC_D , [InstrStage<3, [ALU]>]>, 532 InstrItinData<II_ADD_D , [InstrStage<4, [ALU]>]>, 533 InstrItinData<II_ADD_S , [InstrStage<4, [ALU]>]>, 534 InstrItinData<II_SUB_D , [InstrStage<4, [ALU]>]>, 535 InstrItinData<II_SUB_S , [InstrStage<4, [ALU]>]>, 536 InstrItinData<II_MUL_S , [InstrStage<7, [ALU]>]>, 537 InstrItinData<II_MADD_S , [InstrStage<7, [ALU]>]>, 538 InstrItinData<II_MADDF_S , [InstrStage<7, [ALU]>]>, 539 InstrItinData<II_MSUB_S , [InstrStage<7, [ALU]>]>, 540 InstrItinData<II_MSUBF_S , [InstrStage<7, [ALU]>]>, 541 InstrItinData<II_NMADD_S , [InstrStage<7, [ALU]>]>, 542 InstrItinData<II_NMSUB_S , [InstrStage<7, [ALU]>]>, 543 InstrItinData<II_MUL_D , [InstrStage<8, [ALU]>]>, 544 InstrItinData<II_MADD_D , [InstrStage<8, [ALU]>]>, 545 InstrItinData<II_MADDF_D , [InstrStage<8, [ALU]>]>, 546 InstrItinData<II_MSUB_D , [InstrStage<8, [ALU]>]>, 547 InstrItinData<II_MSUBF_D , [InstrStage<8, [ALU]>]>, 548 InstrItinData<II_NMADD_D , [InstrStage<8, [ALU]>]>, 549 InstrItinData<II_NMSUB_D , [InstrStage<8, [ALU]>]>, 550 InstrItinData<II_DIV_S , [InstrStage<23, [ALU]>]>, 551 InstrItinData<II_DIV_D , [InstrStage<36, [ALU]>]>, 552 InstrItinData<II_SQRT_S , [InstrStage<54, [ALU]>]>, 553 InstrItinData<II_SQRT_D , [InstrStage<12, [ALU]>]>, 554 InstrItinData<II_WSBH , [InstrStage<1, [ALU]>]>, 555 InstrItinData<II_LSA , [InstrStage<1, [ALU]>]>, 556 InstrItinData<II_DLSA , [InstrStage<1, [ALU]>]>, 557 InstrItinData<II_LDC1 , [InstrStage<3, [ALU]>]>, 558 InstrItinData<II_LDC2 , [InstrStage<3, [ALU]>]>, 559 InstrItinData<II_LDC3 , [InstrStage<3, [ALU]>]>, 560 InstrItinData<II_LWC1 , [InstrStage<3, [ALU]>]>, 561 InstrItinData<II_LWC2 , [InstrStage<3, [ALU]>]>, 562 InstrItinData<II_LWC3 , [InstrStage<3, [ALU]>]>, 563 InstrItinData<II_LDXC1 , [InstrStage<3, [ALU]>]>, 564 InstrItinData<II_LWXC1 , [InstrStage<3, [ALU]>]>, 565 InstrItinData<II_LUXC1 , [InstrStage<3, [ALU]>]>, 566 InstrItinData<II_SDC1 , [InstrStage<1, [ALU]>]>, 567 InstrItinData<II_SDC2 , [InstrStage<1, [ALU]>]>, 568 InstrItinData<II_SDC3 , [InstrStage<1, [ALU]>]>, 569 InstrItinData<II_SWC1 , [InstrStage<1, [ALU]>]>, 570 InstrItinData<II_SWC2 , [InstrStage<1, [ALU]>]>, 571 InstrItinData<II_SWC3 , [InstrStage<1, [ALU]>]>, 572 InstrItinData<II_SDXC1 , [InstrStage<1, [ALU]>]>, 573 InstrItinData<II_SWXC1 , [InstrStage<1, [ALU]>]>, 574 InstrItinData<II_SUXC1 , [InstrStage<1, [ALU]>]>, 575 InstrItinData<II_DMFC0 , [InstrStage<2, [ALU]>]>, 576 InstrItinData<II_DMFC1 , [InstrStage<2, [ALU]>]>, 577 InstrItinData<II_DMFC2 , [InstrStage<2, [ALU]>]>, 578 InstrItinData<II_DMTC0 , [InstrStage<2, [ALU]>]>, 579 InstrItinData<II_DMTC1 , [InstrStage<2, [ALU]>]>, 580 InstrItinData<II_DMTC2 , [InstrStage<2, [ALU]>]>, 581 InstrItinData<II_MFC0 , [InstrStage<2, [ALU]>]>, 582 InstrItinData<II_MFC1 , [InstrStage<2, [ALU]>]>, 583 InstrItinData<II_MFC2 , [InstrStage<2, [ALU]>]>, 584 InstrItinData<II_MTC0 , [InstrStage<2, [ALU]>]>, 585 InstrItinData<II_MTC1 , [InstrStage<2, [ALU]>]>, 586 InstrItinData<II_MTC2 , [InstrStage<2, [ALU]>]>, 587 InstrItinData<II_MFHC1 , [InstrStage<2, [ALU]>]>, 588 InstrItinData<II_MTHC1 , [InstrStage<2, [ALU]>]>, 589 InstrItinData<II_CACHE , [InstrStage<1, [ALU]>]>, 590 InstrItinData<II_PREF , [InstrStage<1, [ALU]>]>, 591 InstrItinData<II_CACHEE , [InstrStage<1, [ALU]>]>, 592 InstrItinData<II_PREFE , [InstrStage<1, [ALU]>]>, 593 InstrItinData<II_TLBINV , [InstrStage<1, [ALU]>]>, 594 InstrItinData<II_TLBINVF , [InstrStage<1, [ALU]>]>, 595 InstrItinData<II_LLE , [InstrStage<3, [ALU]>]>, 596 InstrItinData<II_SCE , [InstrStage<1, [ALU]>]> 597 ]>; 598 599 include "MipsScheduleP5600.td" 600
