1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 3 4 ; FIXME: Check something here. Currently it seems fabs + fneg aren't 5 ; into 2 modifiers, although theoretically that should work. 6 7 ; GCN-LABEL: {{^}}fneg_fabs_fadd_f64: 8 ; GCN: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|v{{\[[0-9]+:[0-9]+\]}}| 9 define void @fneg_fabs_fadd_f64(double addrspace(1)* %out, double %x, double %y) { 10 %fabs = call double @llvm.fabs.f64(double %x) 11 %fsub = fsub double -0.000000e+00, %fabs 12 %fadd = fadd double %y, %fsub 13 store double %fadd, double addrspace(1)* %out, align 8 14 ret void 15 } 16 17 define void @v_fneg_fabs_fadd_f64(double addrspace(1)* %out, double addrspace(1)* %xptr, double addrspace(1)* %yptr) { 18 %x = load double, double addrspace(1)* %xptr, align 8 19 %y = load double, double addrspace(1)* %xptr, align 8 20 %fabs = call double @llvm.fabs.f64(double %x) 21 %fsub = fsub double -0.000000e+00, %fabs 22 %fadd = fadd double %y, %fsub 23 store double %fadd, double addrspace(1)* %out, align 8 24 ret void 25 } 26 27 ; GCN-LABEL: {{^}}fneg_fabs_fmul_f64: 28 ; GCN: v_mul_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|{{v\[[0-9]+:[0-9]+\]}}| 29 define void @fneg_fabs_fmul_f64(double addrspace(1)* %out, double %x, double %y) { 30 %fabs = call double @llvm.fabs.f64(double %x) 31 %fsub = fsub double -0.000000e+00, %fabs 32 %fmul = fmul double %y, %fsub 33 store double %fmul, double addrspace(1)* %out, align 8 34 ret void 35 } 36 37 ; GCN-LABEL: {{^}}fneg_fabs_free_f64: 38 define void @fneg_fabs_free_f64(double addrspace(1)* %out, i64 %in) { 39 %bc = bitcast i64 %in to double 40 %fabs = call double @llvm.fabs.f64(double %bc) 41 %fsub = fsub double -0.000000e+00, %fabs 42 store double %fsub, double addrspace(1)* %out 43 ret void 44 } 45 46 ; GCN-LABEL: {{^}}fneg_fabs_fn_free_f64: 47 ; GCN: v_bfrev_b32_e32 [[IMMREG:v[0-9]+]], 1{{$}} 48 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 49 define void @fneg_fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) { 50 %bc = bitcast i64 %in to double 51 %fabs = call double @fabs(double %bc) 52 %fsub = fsub double -0.000000e+00, %fabs 53 store double %fsub, double addrspace(1)* %out 54 ret void 55 } 56 57 ; GCN-LABEL: {{^}}fneg_fabs_f64: 58 ; GCN-DAG: s_load_dwordx2 59 ; GCN-DAG: v_bfrev_b32_e32 [[IMMREG:v[0-9]+]], 1{{$}} 60 ; SI-DAG: s_load_dwordx2 s{{\[}}[[LO_X:[0-9]+]]:[[HI_X:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0xb 61 ; VI-DAG: s_load_dwordx2 s{{\[}}[[LO_X:[0-9]+]]:[[HI_X:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0x2c 62 ; GCN-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]] 63 ; GCN-DAG: v_mov_b32_e32 v[[LO_V:[0-9]+]], s[[LO_X]] 64 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO_V]]:[[HI_V]]{{\]}} 65 define void @fneg_fabs_f64(double addrspace(1)* %out, double %in) { 66 %fabs = call double @llvm.fabs.f64(double %in) 67 %fsub = fsub double -0.000000e+00, %fabs 68 store double %fsub, double addrspace(1)* %out, align 8 69 ret void 70 } 71 72 ; GCN-LABEL: {{^}}fneg_fabs_v2f64: 73 ; GCN: v_bfrev_b32_e32 [[IMMREG:v[0-9]+]], 1{{$}} 74 ; GCN-NOT: 0x80000000 75 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 76 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 77 define void @fneg_fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) { 78 %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in) 79 %fsub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %fabs 80 store <2 x double> %fsub, <2 x double> addrspace(1)* %out 81 ret void 82 } 83 84 ; GCN-LABEL: {{^}}fneg_fabs_v4f64: 85 ; GCN: v_bfrev_b32_e32 [[IMMREG:v[0-9]+]], 1{{$}} 86 ; GCN-NOT: 0x80000000 87 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 88 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 89 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 90 ; GCN: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]] 91 define void @fneg_fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) { 92 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in) 93 %fsub = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %fabs 94 store <4 x double> %fsub, <4 x double> addrspace(1)* %out 95 ret void 96 } 97 98 declare double @fabs(double) readnone 99 declare double @llvm.fabs.f64(double) readnone 100 declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone 101 declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone 102
