1 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s 4 5 6 ; Run with unsafe-fp-math to make sure nothing tries to turn this into 1 / rsqrt(x) 7 8 ; FUNC-LABEL: {{^}}v_safe_fsqrt_f32: 9 ; GCN: v_sqrt_f32_e32 {{v[0-9]+, v[0-9]+}} 10 define void @v_safe_fsqrt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #1 { 11 %r0 = load float, float addrspace(1)* %in 12 %r1 = call float @llvm.sqrt.f32(float %r0) 13 store float %r1, float addrspace(1)* %out 14 ret void 15 } 16 17 ; FUNC-LABEL: {{^}}v_unsafe_fsqrt_f32: 18 ; GCN: v_sqrt_f32_e32 {{v[0-9]+, v[0-9]+}} 19 define void @v_unsafe_fsqrt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #2 { 20 %r0 = load float, float addrspace(1)* %in 21 %r1 = call float @llvm.sqrt.f32(float %r0) 22 store float %r1, float addrspace(1)* %out 23 ret void 24 } 25 26 27 ; FUNC-LABEL: {{^}}s_sqrt_f32: 28 ; GCN: v_sqrt_f32_e32 29 30 ; R600: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z 31 ; R600: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS 32 define void @s_sqrt_f32(float addrspace(1)* %out, float %in) #1 { 33 entry: 34 %fdiv = call float @llvm.sqrt.f32(float %in) 35 store float %fdiv, float addrspace(1)* %out 36 ret void 37 } 38 39 ; FUNC-LABEL: {{^}}s_sqrt_v2f32: 40 ; GCN: v_sqrt_f32_e32 41 ; GCN: v_sqrt_f32_e32 42 43 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W 44 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS 45 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X 46 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS 47 define void @s_sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 { 48 entry: 49 %fdiv = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) 50 store <2 x float> %fdiv, <2 x float> addrspace(1)* %out 51 ret void 52 } 53 54 ; FUNC-LABEL: {{^}}s_sqrt_v4f32: 55 ; GCN: v_sqrt_f32_e32 56 ; GCN: v_sqrt_f32_e32 57 ; GCN: v_sqrt_f32_e32 58 ; GCN: v_sqrt_f32_e32 59 60 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y 61 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS 62 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z 63 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS 64 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W 65 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS 66 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X 67 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS 68 define void @s_sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) #1 { 69 entry: 70 %fdiv = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) 71 store <4 x float> %fdiv, <4 x float> addrspace(1)* %out 72 ret void 73 } 74 75 ; FUNC-LABEL: {{^}}elim_redun_check_neg0: 76 ; GCN: v_sqrt_f32_e32 77 ; GCN-NOT: v_cndmask 78 define void @elim_redun_check_neg0(float addrspace(1)* %out, float %in) #1 { 79 entry: 80 %sqrt = call float @llvm.sqrt.f32(float %in) 81 %cmp = fcmp olt float %in, -0.000000e+00 82 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt 83 store float %res, float addrspace(1)* %out 84 ret void 85 } 86 87 ; FUNC-LABEL: {{^}}elim_redun_check_pos0: 88 ; GCN: v_sqrt_f32_e32 89 ; GCN-NOT: v_cndmask 90 define void @elim_redun_check_pos0(float addrspace(1)* %out, float %in) #1 { 91 entry: 92 %sqrt = call float @llvm.sqrt.f32(float %in) 93 %cmp = fcmp olt float %in, 0.000000e+00 94 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt 95 store float %res, float addrspace(1)* %out 96 ret void 97 } 98 99 ; FUNC-LABEL: {{^}}elim_redun_check_ult: 100 ; GCN: v_sqrt_f32_e32 101 ; GCN-NOT: v_cndmask 102 define void @elim_redun_check_ult(float addrspace(1)* %out, float %in) #1 { 103 entry: 104 %sqrt = call float @llvm.sqrt.f32(float %in) 105 %cmp = fcmp ult float %in, -0.000000e+00 106 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt 107 store float %res, float addrspace(1)* %out 108 ret void 109 } 110 111 ; FUNC-LABEL: {{^}}elim_redun_check_v2: 112 ; GCN: v_sqrt_f32_e32 113 ; GCN: v_sqrt_f32_e32 114 ; GCN-NOT: v_cndmask 115 define void @elim_redun_check_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 { 116 entry: 117 %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) 118 %cmp = fcmp olt <2 x float> %in, <float -0.000000e+00, float -0.000000e+00> 119 %res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt 120 store <2 x float> %res, <2 x float> addrspace(1)* %out 121 ret void 122 } 123 124 ; FUNC-LABEL: {{^}}elim_redun_check_v2_ult 125 ; GCN: v_sqrt_f32_e32 126 ; GCN: v_sqrt_f32_e32 127 ; GCN-NOT: v_cndmask 128 define void @elim_redun_check_v2_ult(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 { 129 entry: 130 %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) 131 %cmp = fcmp ult <2 x float> %in, <float -0.000000e+00, float -0.000000e+00> 132 %res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt 133 store <2 x float> %res, <2 x float> addrspace(1)* %out 134 ret void 135 } 136 137 declare float @llvm.sqrt.f32(float %in) #0 138 declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) #0 139 declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) #0 140 141 attributes #0 = { nounwind readnone } 142 attributes #1 = { nounwind "unsafe-fp-math"="false" } 143 attributes #2 = { nounwind "unsafe-fp-math"="true" } 144
