1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s 3 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 4 5 declare float @llvm.fabs.f32(float) nounwind readnone 6 declare float @llvm.AMDGPU.clamp.f32(float, float, float) nounwind readnone 7 8 ; FUNC-LABEL: {{^}}clamp_0_1_f32: 9 ; SI: s_load_dword [[ARG:s[0-9]+]], 10 ; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, [[ARG]] clamp{{$}} 11 ; SI: buffer_store_dword [[RESULT]] 12 ; SI: s_endpgm 13 14 ; EG: MOV_SAT 15 define void @clamp_0_1_f32(float addrspace(1)* %out, float %src) nounwind { 16 %clamp = call float @llvm.AMDGPU.clamp.f32(float %src, float 0.0, float 1.0) nounwind readnone 17 store float %clamp, float addrspace(1)* %out, align 4 18 ret void 19 } 20 21 ; FUNC-LABEL: {{^}}clamp_fabs_0_1_f32: 22 ; SI: s_load_dword [[ARG:s[0-9]+]], 23 ; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, |[[ARG]]| clamp{{$}} 24 ; SI: buffer_store_dword [[RESULT]] 25 ; SI: s_endpgm 26 define void @clamp_fabs_0_1_f32(float addrspace(1)* %out, float %src) nounwind { 27 %src.fabs = call float @llvm.fabs.f32(float %src) nounwind readnone 28 %clamp = call float @llvm.AMDGPU.clamp.f32(float %src.fabs, float 0.0, float 1.0) nounwind readnone 29 store float %clamp, float addrspace(1)* %out, align 4 30 ret void 31 } 32 33 ; FUNC-LABEL: {{^}}clamp_fneg_0_1_f32: 34 ; SI: s_load_dword [[ARG:s[0-9]+]], 35 ; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, -[[ARG]] clamp{{$}} 36 ; SI: buffer_store_dword [[RESULT]] 37 ; SI: s_endpgm 38 define void @clamp_fneg_0_1_f32(float addrspace(1)* %out, float %src) nounwind { 39 %src.fneg = fsub float -0.0, %src 40 %clamp = call float @llvm.AMDGPU.clamp.f32(float %src.fneg, float 0.0, float 1.0) nounwind readnone 41 store float %clamp, float addrspace(1)* %out, align 4 42 ret void 43 } 44 45 ; FUNC-LABEL: {{^}}clamp_fneg_fabs_0_1_f32: 46 ; SI: s_load_dword [[ARG:s[0-9]+]], 47 ; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, -|[[ARG]]| clamp{{$}} 48 ; SI: buffer_store_dword [[RESULT]] 49 ; SI: s_endpgm 50 define void @clamp_fneg_fabs_0_1_f32(float addrspace(1)* %out, float %src) nounwind { 51 %src.fabs = call float @llvm.fabs.f32(float %src) nounwind readnone 52 %src.fneg.fabs = fsub float -0.0, %src.fabs 53 %clamp = call float @llvm.AMDGPU.clamp.f32(float %src.fneg.fabs, float 0.0, float 1.0) nounwind readnone 54 store float %clamp, float addrspace(1)* %out, align 4 55 ret void 56 } 57
