1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 3 4 ; SI-LABEL: {{^}}s_movk_i32_k0: 5 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff{{$}} 6 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 7 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 8 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]] 9 ; SI: s_endpgm 10 define void @s_movk_i32_k0(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 11 %loada = load i64, i64 addrspace(1)* %a, align 4 12 %or = or i64 %loada, 4295032831 ; ((1 << 16) - 1) | (1 << 32) 13 store i64 %or, i64 addrspace(1)* %out 14 ret void 15 } 16 17 ; SI-LABEL: {{^}}s_movk_i32_k1: 18 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x7fff{{$}} 19 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 20 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 21 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]] 22 ; SI: s_endpgm 23 define void @s_movk_i32_k1(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 24 %loada = load i64, i64 addrspace(1)* %a, align 4 25 %or = or i64 %loada, 4295000063 ; ((1 << 15) - 1) | (1 << 32) 26 store i64 %or, i64 addrspace(1)* %out 27 ret void 28 } 29 30 ; SI-LABEL: {{^}}s_movk_i32_k2: 31 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x7fff{{$}} 32 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 33 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 34 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 64, v[[HI_VREG]] 35 ; SI: s_endpgm 36 define void @s_movk_i32_k2(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 37 %loada = load i64, i64 addrspace(1)* %a, align 4 38 %or = or i64 %loada, 274877939711 ; ((1 << 15) - 1) | (64 << 32) 39 store i64 %or, i64 addrspace(1)* %out 40 ret void 41 } 42 43 ; SI-LABEL: {{^}}s_movk_i32_k3: 44 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0x8000{{$}} 45 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 46 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 47 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]] 48 ; SI: s_endpgm 49 define void @s_movk_i32_k3(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 50 %loada = load i64, i64 addrspace(1)* %a, align 4 51 %or = or i64 %loada, 4295000064 ; (1 << 15) | (1 << 32) 52 store i64 %or, i64 addrspace(1)* %out 53 ret void 54 } 55 56 ; SI-LABEL: {{^}}s_movk_i32_k4: 57 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0x20000{{$}} 58 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 59 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 60 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]] 61 ; SI: s_endpgm 62 define void @s_movk_i32_k4(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 63 %loada = load i64, i64 addrspace(1)* %a, align 4 64 %or = or i64 %loada, 4295098368 ; (1 << 17) | (1 << 32) 65 store i64 %or, i64 addrspace(1)* %out 66 ret void 67 } 68 69 ; SI-LABEL: {{^}}s_movk_i32_k5: 70 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0xffef{{$}} 71 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0xff00ffff{{$}} 72 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 73 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 74 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 75 ; SI: s_endpgm 76 define void @s_movk_i32_k5(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 77 %loada = load i64, i64 addrspace(1)* %a, align 4 78 %or = or i64 %loada, 18374967954648334319 ; -17 & 0xff00ffffffffffff 79 store i64 %or, i64 addrspace(1)* %out 80 ret void 81 } 82 83 ; SI-LABEL: {{^}}s_movk_i32_k6: 84 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x41{{$}} 85 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 86 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 87 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 63, v[[HI_VREG]] 88 ; SI: s_endpgm 89 define void @s_movk_i32_k6(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 90 %loada = load i64, i64 addrspace(1)* %a, align 4 91 %or = or i64 %loada, 270582939713 ; 65 | (63 << 32) 92 store i64 %or, i64 addrspace(1)* %out 93 ret void 94 } 95 96 ; SI-LABEL: {{^}}s_movk_i32_k7: 97 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x2000{{$}} 98 ; SI-DAG: s_movk_i32 [[HI_S_IMM:s[0-9]+]], 0x4000{{$}} 99 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 100 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 101 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 102 ; SI: s_endpgm 103 define void @s_movk_i32_k7(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 104 %loada = load i64, i64 addrspace(1)* %a, align 4 105 %or = or i64 %loada, 70368744185856; ((1 << 13)) | ((1 << 14) << 32) 106 store i64 %or, i64 addrspace(1)* %out 107 ret void 108 } 109 110 111 ; SI-LABEL: {{^}}s_movk_i32_k8: 112 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8000{{$}} 113 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}} 114 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 115 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 116 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 117 ; SI: s_endpgm 118 define void @s_movk_i32_k8(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 119 %loada = load i64, i64 addrspace(1)* %a, align 4 120 %or = or i64 %loada, 1229782942255906816 ; 0x11111111ffff8000 121 store i64 %or, i64 addrspace(1)* %out 122 ret void 123 } 124 125 ; SI-LABEL: {{^}}s_movk_i32_k9: 126 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8001{{$}} 127 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}} 128 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 129 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 130 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 131 ; SI: s_endpgm 132 define void @s_movk_i32_k9(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 133 %loada = load i64, i64 addrspace(1)* %a, align 4 134 %or = or i64 %loada, 1229782942255906817 ; 0x11111111ffff8001 135 store i64 %or, i64 addrspace(1)* %out 136 ret void 137 } 138 139 ; SI-LABEL: {{^}}s_movk_i32_k10: 140 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8888{{$}} 141 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}} 142 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 143 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 144 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 145 ; SI: s_endpgm 146 define void @s_movk_i32_k10(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 147 %loada = load i64, i64 addrspace(1)* %a, align 4 148 %or = or i64 %loada, 1229782942255909000 ; 0x11111111ffff8888 149 store i64 %or, i64 addrspace(1)* %out 150 ret void 151 } 152 153 ; SI-LABEL: {{^}}s_movk_i32_k11: 154 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8fff{{$}} 155 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}} 156 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 157 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 158 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 159 ; SI: s_endpgm 160 define void @s_movk_i32_k11(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 161 %loada = load i64, i64 addrspace(1)* %a, align 4 162 %or = or i64 %loada, 1229782942255910911 ; 0x11111111ffff8fff 163 store i64 %or, i64 addrspace(1)* %out 164 ret void 165 } 166 167 ; SI-LABEL: {{^}}s_movk_i32_k12: 168 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff7001{{$}} 169 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}} 170 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 171 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 172 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]] 173 ; SI: s_endpgm 174 define void @s_movk_i32_k12(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) { 175 %loada = load i64, i64 addrspace(1)* %a, align 4 176 %or = or i64 %loada, 1229782942255902721 ; 0x11111111ffff7001 177 store i64 %or, i64 addrspace(1)* %out 178 ret void 179 } 180
