1 ; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-DIV 2 3 ; int f(int n, int d) { 4 ; if (n / d) 5 ; return 1; 6 ; return 0; 7 ; } 8 9 define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) { 10 entry: 11 %retval = alloca i32, align 4 12 %n.addr = alloca i32, align 4 13 %d.addr = alloca i32, align 4 14 store i32 %n, i32* %n.addr, align 4 15 store i32 %d, i32* %d.addr, align 4 16 %0 = load i32, i32* %n.addr, align 4 17 %1 = load i32, i32* %d.addr, align 4 18 %div = sdiv i32 %0, %1 19 %tobool = icmp ne i32 %div, 0 20 br i1 %tobool, label %if.then, label %if.end 21 22 if.then: 23 store i32 1, i32* %retval, align 4 24 br label %return 25 26 if.end: 27 store i32 0, i32* %retval, align 4 28 br label %return 29 30 return: 31 %2 = load i32, i32* %retval, align 4 32 ret i32 %2 33 } 34 35 ; CHECK-DIV-DAG: BB#0 36 ; CHECK-DIV-DAG: Successors according to CFG: BB#5({{.*}}) BB#4 37 ; CHECK-DIV-DAG: BB#1 38 ; CHECK-DIV-DAG: Successors according to CFG: BB#3 39 ; CHECK-DIV-DAG: BB#2 40 ; CHECK-DIV-DAG: Successors according to CFG: BB#3 41 ; CHECK-DIV-DAG: BB#3 42 ; CHECK-DIV-DAG: BB#4 43 ; CHECK-DIV-DAG: Successors according to CFG: BB#1({{.*}}) BB#2 44 ; CHECK-DIV-DAG: BB#5 45 46 ; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-MOD 47 48 ; int r; 49 ; int g(int l, int m) { 50 ; if (m <= 0) 51 ; return 0; 52 ; return (r = l % m); 53 ; } 54 55 @r = common global i32 0, align 4 56 57 define arm_aapcs_vfpcc i32 @g(i32 %l, i32 %m) { 58 entry: 59 %cmp = icmp eq i32 %m, 0 60 br i1 %cmp, label %return, label %if.end 61 62 if.end: 63 %rem = urem i32 %l, %m 64 store i32 %rem, i32* @r, align 4 65 br label %return 66 67 return: 68 %retval.0 = phi i32 [ %rem, %if.end ], [ 0, %entry ] 69 ret i32 %retval.0 70 } 71 72 ; CHECK-MOD-DAG: BB#0 73 ; CHECK-MOD-DAG: Successors according to CFG: BB#2({{.*}}) BB#1 74 ; CHECK-MOD-DAG: BB#1 75 ; CHECK-MOD-DAG: Successors according to CFG: BB#4({{.*}}) BB#3 76 ; CHECK-MOD-DAG: BB#2 77 ; CHECK-MOD-DAG: BB#3 78 ; CHECK-MOD-DAG: Successors according to CFG: BB#2 79 ; CHECK-MOD-DAG: BB#4 80 81 ; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -filetype asm -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-CFG 82 ; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-CFG-ASM 83 84 ; unsigned c; 85 ; extern unsigned long g(void); 86 ; int f(unsigned u, signed char b) { 87 ; if (b) 88 ; c = g() % u; 89 ; return c; 90 ; } 91 92 @c = common global i32 0, align 4 93 94 declare arm_aapcs_vfpcc i32 @i() 95 96 define arm_aapcs_vfpcc i32 @h(i32 %u, i8 signext %b) #0 { 97 entry: 98 %tobool = icmp eq i8 %b, 0 99 br i1 %tobool, label %entry.if.end_crit_edge, label %if.then 100 101 entry.if.end_crit_edge: 102 %.pre = load i32, i32* @c, align 4 103 br label %if.end 104 105 if.then: 106 %call = tail call arm_aapcs_vfpcc i32 @i() 107 %rem = urem i32 %call, %u 108 store i32 %rem, i32* @c, align 4 109 br label %if.end 110 111 if.end: 112 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %rem, %if.then ] 113 ret i32 %0 114 } 115 116 attributes #0 = { optsize } 117 118 ; CHECK-CFG-DAG: BB#0 119 ; CHECK-CFG-DAG: t2Bcc <BB#2> 120 ; CHECK-CFG-DAG: t2B <BB#1> 121 122 ; CHECK-CFG-DAG: BB#1 123 ; CHECK-CFG-DAG: t2B <BB#3> 124 125 ; CHECK-CFG-DAG: BB#2 126 ; CHECK-CFG-DAG: tCBZ %vreg{{[0-9]}}, <BB#5> 127 ; CHECK-CFG-DAG: t2B <BB#4> 128 129 ; CHECK-CFG-DAG: BB#4 130 131 ; CHECK-CFG-DAG: BB#3 132 ; CHECK-CFG-DAG: tBX_RET 133 134 ; CHECK-CFG-DAG: BB#5 135 ; CHECK-CFG-DAG: t2UDF 249 136 137 ; CHECK-CFG-ASM-LABEL: h: 138 ; CHECK-CFG-ASM: cbz r{{[0-9]}}, .LBB2_2 139 ; CHECK-CFG-ASM: b .LBB2_4 140 ; CHECK-CFG-ASM-LABEL: .LBB2_2: 141 ; CHECK-CFG-ASM-NEXT: udf.w #249 142 ; CHECK-CFG-ASM-LABEL: .LBB2_4: 143 ; CHECK-CFG-ASM: bl __rt_udiv 144 ; CHECK-CFG-ASM: pop.w {{{.*}}, r11, pc} 145 146 ; RUN: llc -O0 -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK 147 148 ; long k(void); 149 ; int l(void); 150 ; int j(int i) { 151 ; if (l() == -1) 152 ; return 0; 153 ; return k() % i; 154 ; } 155 156 declare arm_aapcs_vfpcc i32 @k() 157 declare arm_aapcs_vfpcc i32 @l() 158 159 define arm_aapcs_vfpcc i32 @j(i32 %i) { 160 entry: 161 %retval = alloca i32, align 4 162 %i.addr = alloca i32, align 4 163 store i32 %i, i32* %i.addr, align 4 164 %call = call arm_aapcs_vfpcc i32 @l() 165 %cmp = icmp eq i32 %call, -1 166 br i1 %cmp, label %if.then, label %if.end 167 168 if.then: 169 store i32 0, i32* %retval, align 4 170 br label %return 171 172 if.end: 173 %call1 = call arm_aapcs_vfpcc i32 @k() 174 %0 = load i32, i32* %i.addr, align 4 175 %rem = srem i32 %call1, %0 176 store i32 %rem, i32* %retval, align 4 177 br label %return 178 179 return: 180 %1 = load i32, i32* %retval, align 4 181 ret i32 %1 182 } 183 184 ; CHECK-WIN__DBZCHK-LABEL: j: 185 ; CHECK-WIN__DBZCHK: cbz r{{[0-7]}}, .LBB 186 ; CHECK-WIN__DBZCHK-NOT: cbz r8, .LBB 187 ; CHECK-WIN__DBZCHK-NOT: cbz r9, .LBB 188 ; CHECK-WIN__DBZCHK-NOT: cbz r10, .LBB 189 ; CHECK-WIN__DBZCHK-NOT: cbz r11, .LBB 190 ; CHECK-WIN__DBZCHK-NOT: cbz ip, .LBB 191 ; CHECK-WIN__DBZCHK-NOT: cbz lr, .LBB 192 193
