1 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2 target triple = "powerpc64-unknown-linux-gnu" 3 4 define void @autogen_SD4932(i8) { 5 BB: 6 %A4 = alloca i8 7 %A = alloca <1 x ppc_fp128> 8 %Shuff = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> <i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 undef, i32 29, i32 31, i32 1, i32 3, i32 5> 9 br label %CF 10 11 CF: ; preds = %CF80, %CF, %BB 12 %L5 = load i64, i64* undef 13 store i8 %0, i8* %A4 14 %Shuff7 = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> %Shuff, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 undef, i32 20, i32 22, i32 24, i32 26> 15 %PC10 = bitcast i8* %A4 to ppc_fp128* 16 br i1 undef, label %CF, label %CF77 17 18 CF77: ; preds = %CF81, %CF83, %CF77, %CF 19 br i1 undef, label %CF77, label %CF82 20 21 CF82: ; preds = %CF82, %CF77 22 %L19 = load i64, i64* undef 23 store <1 x ppc_fp128> zeroinitializer, <1 x ppc_fp128>* %A 24 store i8 -65, i8* %A4 25 br i1 undef, label %CF82, label %CF83 26 27 CF83: ; preds = %CF82 28 %L34 = load i64, i64* undef 29 br i1 undef, label %CF77, label %CF81 30 31 CF81: ; preds = %CF83 32 %Shuff43 = shufflevector <16 x i32> %Shuff7, <16 x i32> undef, <16 x i32> <i32 15, i32 17, i32 19, i32 21, i32 23, i32 undef, i32 undef, i32 29, i32 31, i32 undef, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13> 33 store ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128* %PC10 34 br i1 undef, label %CF77, label %CF78 35 36 CF78: ; preds = %CF78, %CF81 37 br i1 undef, label %CF78, label %CF79 38 39 CF79: ; preds = %CF79, %CF78 40 br i1 undef, label %CF79, label %CF80 41 42 CF80: ; preds = %CF79 43 store i64 %L19, i64* undef 44 %Cmp75 = icmp uge i32 206779, undef 45 br i1 %Cmp75, label %CF, label %CF76 46 47 CF76: ; preds = %CF80 48 store i64 %L5, i64* undef 49 store i64 %L34, i64* undef 50 ret void 51 } 52 53 define void @autogen_SD88042(i8*, i32*, i8) { 54 BB: 55 %A4 = alloca <2 x i1> 56 %A = alloca <16 x float> 57 %L = load i8, i8* %0 58 %Sl = select i1 false, <16 x float>* %A, <16 x float>* %A 59 %PC = bitcast <2 x i1>* %A4 to i64* 60 %Sl27 = select i1 false, i8 undef, i8 %L 61 br label %CF 62 63 CF: ; preds = %CF78, %CF, %BB 64 %PC33 = bitcast i32* %1 to i32* 65 br i1 undef, label %CF, label %CF77 66 67 CF77: ; preds = %CF80, %CF77, %CF 68 store <16 x float> zeroinitializer, <16 x float>* %Sl 69 %L58 = load i32, i32* %PC33 70 store i8 0, i8* %0 71 br i1 undef, label %CF77, label %CF80 72 73 CF80: ; preds = %CF77 74 store i64 0, i64* %PC 75 %E67 = extractelement <8 x i1> zeroinitializer, i32 1 76 br i1 %E67, label %CF77, label %CF78 77 78 CF78: ; preds = %CF80 79 %Cmp73 = icmp eq i32 189865, %L58 80 br i1 %Cmp73, label %CF, label %CF76 81 82 CF76: ; preds = %CF78 83 store i8 %2, i8* %0 84 store i8 %Sl27, i8* %0 85 ret void 86 } 87 88 define void @autogen_SD37497(i8*, i32*, i64*) { 89 BB: 90 %A1 = alloca i1 91 %I8 = insertelement <1 x i32> <i32 -1>, i32 454855, i32 0 92 %Cmp = icmp ult <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, undef 93 %L10 = load i64, i64* %2 94 %E11 = extractelement <4 x i1> %Cmp, i32 2 95 br label %CF72 96 97 CF72: ; preds = %CF74, %CF72, %BB 98 store double 0xB47BB29A53790718, double* undef 99 %E18 = extractelement <1 x i32> <i32 -1>, i32 0 100 %FC22 = sitofp <1 x i32> %I8 to <1 x float> 101 br i1 undef, label %CF72, label %CF74 102 103 CF74: ; preds = %CF72 104 store i8 0, i8* %0 105 %PC = bitcast i1* %A1 to i64* 106 %L31 = load i64, i64* %PC 107 store i64 477323, i64* %PC 108 %Sl37 = select i1 false, i32* undef, i32* %1 109 %Cmp38 = icmp ugt i1 undef, undef 110 br i1 %Cmp38, label %CF72, label %CF73 111 112 CF73: ; preds = %CF74 113 store i64 %L31, i64* %PC 114 %B55 = fdiv <1 x float> undef, %FC22 115 %Sl63 = select i1 %E11, i32* undef, i32* %Sl37 116 store i32 %E18, i32* %Sl63 117 store i64 %L10, i64* %PC 118 ret void 119 } 120
