1 ; RUN: llc -mcpu=pwr7 < %s | FileCheck %s 2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 3 target triple = "powerpc64-unknown-linux-gnu" 4 5 declare <4 x i32> @llvm.ppc.altivec.lvx(i8*) #1 6 7 define <4 x i32> @test1(<4 x i32>* %h) #0 { 8 entry: 9 %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1 10 %hv = bitcast <4 x i32>* %h1 to i8* 11 %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv) 12 13 %v0 = load <4 x i32>, <4 x i32>* %h, align 8 14 15 %a = add <4 x i32> %v0, %vl 16 ret <4 x i32> %a 17 18 ; CHECK-LABEL: @test1 19 ; CHECK: li [[REG:[0-9]+]], 16 20 ; CHECK-NOT: li {{[0-9]+}}, 15 21 ; CHECK-DAG: lvx {{[0-9]+}}, 0, 3 22 ; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]] 23 ; CHECK: blr 24 } 25 26 declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*) #0 27 28 define <4 x i32> @test2(<4 x i32>* %h, <4 x i32> %d) #0 { 29 entry: 30 %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1 31 %hv = bitcast <4 x i32>* %h1 to i8* 32 call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv) 33 34 %v0 = load <4 x i32>, <4 x i32>* %h, align 8 35 36 ret <4 x i32> %v0 37 38 ; CHECK-LABEL: @test2 39 ; CHECK: li [[REG:[0-9]+]], 16 40 ; CHECK-NOT: li {{[0-9]+}}, 15 41 ; CHECK-DAG: lvx {{[0-9]+}}, 0, 3 42 ; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]] 43 ; CHECK: blr 44 } 45 46 attributes #0 = { nounwind } 47 attributes #1 = { nounwind readonly } 48 49
