1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s 3 4 define <8 x i32> @perm_cl_int_8x32(<8 x i32> %A) nounwind readnone { 5 ; CHECK-LABEL: perm_cl_int_8x32: 6 ; CHECK: ## BB#0: ## %entry 7 ; CHECK-NEXT: vmovdqa {{.*#+}} ymm1 = [0,7,2,1,2,7,6,0] 8 ; CHECK-NEXT: vpermd %ymm0, %ymm1, %ymm0 9 ; CHECK-NEXT: retq 10 entry: 11 %B = shufflevector <8 x i32> %A, <8 x i32> undef, <8 x i32> <i32 0, i32 7, i32 2, i32 1, i32 2, i32 7, i32 6, i32 0> 12 ret <8 x i32> %B 13 } 14 15 16 define <8 x float> @perm_cl_fp_8x32(<8 x float> %A) nounwind readnone { 17 ; CHECK-LABEL: perm_cl_fp_8x32: 18 ; CHECK: ## BB#0: ## %entry 19 ; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = <u,7,2,u,4,u,1,6> 20 ; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm0 21 ; CHECK-NEXT: retq 22 entry: 23 %B = shufflevector <8 x float> %A, <8 x float> undef, <8 x i32> <i32 undef, i32 7, i32 2, i32 undef, i32 4, i32 undef, i32 1, i32 6> 24 ret <8 x float> %B 25 } 26 27 define <4 x i64> @perm_cl_int_4x64(<4 x i64> %A) nounwind readnone { 28 ; CHECK-LABEL: perm_cl_int_4x64: 29 ; CHECK: ## BB#0: ## %entry 30 ; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,1] 31 ; CHECK-NEXT: retq 32 entry: 33 %B = shufflevector <4 x i64> %A, <4 x i64> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 34 ret <4 x i64> %B 35 } 36 37 define <4 x double> @perm_cl_fp_4x64(<4 x double> %A) nounwind readnone { 38 ; CHECK-LABEL: perm_cl_fp_4x64: 39 ; CHECK: ## BB#0: ## %entry 40 ; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,3,2,1] 41 ; CHECK-NEXT: retq 42 entry: 43 %B = shufflevector <4 x double> %A, <4 x double> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 44 ret <4 x double> %B 45 } 46
