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      1 ; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
      2 
      3 define i32 *@addr_G1() {
      4 entry:
      5 ; CHECK-LABEL: addr_G1:
      6 ; CHECK: ldaw r0, dp[G1]
      7 	ret i32* @G1
      8 }
      9 
     10 define i32 *@addr_G2() {
     11 entry:
     12 ; CHECK-LABEL: addr_G2:
     13 ; CHECK: ldaw r0, dp[G2]
     14 	ret i32* @G2
     15 }
     16 
     17 define i32 *@addr_G3() {
     18 entry:
     19 ; CHECK-LABEL: addr_G3:
     20 ; CHECK: ldaw r0, dp[G3]
     21 	ret i32* @G3
     22 }
     23 
     24 define i32 *@addr_iG3() {
     25 entry:
     26 ; CHECK-LABEL: addr_iG3:
     27 ; CHECK: ldaw r11, cp[iG3]
     28 ; CHECK: mov r0, r11
     29   ret i32* @iG3
     30 }
     31 
     32 define i32 **@addr_G4() {
     33 entry:
     34 ; CHECK-LABEL: addr_G4:
     35 ; CHECK: ldaw r0, dp[G4]
     36 	ret i32** @G4
     37 }
     38 
     39 define i32 **@addr_G5() {
     40 entry:
     41 ; CHECK-LABEL: addr_G5:
     42 ; CHECK: ldaw r0, dp[G5]
     43 	ret i32** @G5
     44 }
     45 
     46 define i32 **@addr_iG5() {
     47 entry:
     48 ; CHECK-LABEL: addr_iG5:
     49 ; CHECK: ldaw r11, cp[iG5]
     50 ; CHECK: mov r0, r11
     51   ret i32** @iG5
     52 }
     53 
     54 define i32 **@addr_G6() {
     55 entry:
     56 ; CHECK-LABEL: addr_G6:
     57 ; CHECK: ldaw r0, dp[G6]
     58 	ret i32** @G6
     59 }
     60 
     61 define i32 **@addr_G7() {
     62 entry:
     63 ; CHECK-LABEL: addr_G7:
     64 ; CHECK: ldaw r0, dp[G7]
     65 	ret i32** @G7
     66 }
     67 
     68 define i32 **@addr_iG7() {
     69 entry:
     70 ; CHECK-LABEL: addr_iG7:
     71 ; CHECK: ldaw r11, cp[iG7]
     72 ; CHECK: mov r0, r11
     73   ret i32** @iG7
     74 }
     75 
     76 define i32 *@addr_G8() {
     77 entry:
     78 ; CHECK-LABEL: addr_G8:
     79 ; CHECK: ldaw r0, dp[G8]
     80 	ret i32* @G8
     81 }
     82 
     83 @G1 = global i32 4712
     84 ; CHECK: .section .dp.data,"awd",@progbits
     85 ; CHECK: G1:
     86 
     87 @G2 = global i32 0
     88 ; CHECK: .section .dp.bss,"awd",@nobits
     89 ; CHECK: G2:
     90 
     91 @G3 = unnamed_addr constant i32 9401
     92 ; CHECK: .section .dp.rodata,"awd",@progbits
     93 ; CHECK: G3:
     94 
     95 @iG3 = internal constant i32 9401
     96 ; CHECK: .section .cp.rodata,"ac",@progbits
     97 ; CHECK: iG3:
     98 
     99 @G4 = global i32* @G1
    100 ; CHECK: .section .dp.data,"awd",@progbits
    101 ; CHECK: G4:
    102 
    103 @G5 = unnamed_addr constant i32* @G1
    104 ; CHECK: .section .dp.rodata,"awd",@progbits
    105 ; CHECK: G5:
    106 
    107 @iG5 = internal unnamed_addr constant i32* @G1
    108 ; CHECK: .section .cp.rodata,"ac",@progbits
    109 ; CHECK: iG5:
    110 
    111 @G6 = global i32* @G8
    112 ; CHECK: .section .dp.data,"awd",@progbits
    113 ; CHECK: G6:
    114 
    115 @G7 = unnamed_addr constant i32* @G8
    116 ; CHECK: .section .dp.rodata,"awd",@progbits
    117 ; CHECK: G7:
    118 
    119 @iG7 = internal unnamed_addr constant i32* @G8
    120 ; CHECK: .section .cp.rodata,"ac",@progbits
    121 ; CHECK: iG7:
    122 
    123 @G8 = global i32 9312
    124 ; CHECK: .section .dp.data,"awd",@progbits
    125 ; CHECK: G8:
    126 
    127 @array = global [10 x i16] zeroinitializer, align 2
    128 ; CHECK: .globl  array.globound
    129 ; CHECK:  array.globound = 10
    130