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      1 ; RUN: llc < %s -march=xcore | FileCheck %s
      2 
      3 @size = global i32 0		; <i32*> [#uses=1]
      4 @g0 = external global i32		; <i32*> [#uses=2]
      5 @g1 = external global i32		; <i32*> [#uses=2]
      6 @g2 = external global i32		; <i32*> [#uses=2]
      7 @g3 = external global i32		; <i32*> [#uses=2]
      8 @g4 = external global i32		; <i32*> [#uses=2]
      9 @g5 = external global i32		; <i32*> [#uses=2]
     10 @g6 = external global i32		; <i32*> [#uses=2]
     11 @g7 = external global i32		; <i32*> [#uses=2]
     12 @g8 = external global i32		; <i32*> [#uses=2]
     13 @g9 = external global i32		; <i32*> [#uses=2]
     14 @g10 = external global i32		; <i32*> [#uses=2]
     15 @g11 = external global i32		; <i32*> [#uses=2]
     16 
     17 define void @f() nounwind {
     18 entry:
     19 	%x = alloca [100 x i32], align 4		; <[100 x i32]*> [#uses=2]
     20 	%0 = load i32, i32* @size, align 4		; <i32> [#uses=1]
     21 	%1 = alloca i32, i32 %0, align 4		; <i32*> [#uses=1]
     22 	%2 = load volatile i32, i32* @g0, align 4		; <i32> [#uses=1]
     23 	%3 = load volatile i32, i32* @g1, align 4		; <i32> [#uses=1]
     24 	%4 = load volatile i32, i32* @g2, align 4		; <i32> [#uses=1]
     25 	%5 = load volatile i32, i32* @g3, align 4		; <i32> [#uses=1]
     26 	%6 = load volatile i32, i32* @g4, align 4		; <i32> [#uses=1]
     27 	%7 = load volatile i32, i32* @g5, align 4		; <i32> [#uses=1]
     28 	%8 = load volatile i32, i32* @g6, align 4		; <i32> [#uses=1]
     29 	%9 = load volatile i32, i32* @g7, align 4		; <i32> [#uses=1]
     30 	%10 = load volatile i32, i32* @g8, align 4		; <i32> [#uses=1]
     31 	%11 = load volatile i32, i32* @g9, align 4		; <i32> [#uses=1]
     32 	%12 = load volatile i32, i32* @g10, align 4		; <i32> [#uses=1]
     33 	%13 = load volatile i32, i32* @g11, align 4		; <i32> [#uses=2]
     34 	%14 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 50		; <i32*> [#uses=1]
     35 	store i32 %13, i32* %14, align 4
     36 	store volatile i32 %13, i32* @g11, align 4
     37 	store volatile i32 %12, i32* @g10, align 4
     38 	store volatile i32 %11, i32* @g9, align 4
     39 	store volatile i32 %10, i32* @g8, align 4
     40 	store volatile i32 %9, i32* @g7, align 4
     41 	store volatile i32 %8, i32* @g6, align 4
     42 	store volatile i32 %7, i32* @g5, align 4
     43 	store volatile i32 %6, i32* @g4, align 4
     44 	store volatile i32 %5, i32* @g3, align 4
     45 	store volatile i32 %4, i32* @g2, align 4
     46 	store volatile i32 %3, i32* @g1, align 4
     47 	store volatile i32 %2, i32* @g0, align 4
     48 	%x1 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 0		; <i32*> [#uses=1]
     49 	call void @g(i32* %x1, i32* %1) nounwind
     50 	ret void
     51 }
     52 declare void @g(i32*, i32*)
     53 
     54 
     55 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
     56 ; CHECK: .p2align  2
     57 ; CHECK: [[ARG5:.LCPI[0-9_]+]]:
     58 ; CHECK: .long   100003
     59 ; CHECK: [[INDEX0:.LCPI[0-9_]+]]:
     60 ; CHECK: .long   80002
     61 ; CHECK: [[INDEX1:.LCPI[0-9_]+]]:
     62 ; CHECK: .long   81002
     63 ; CHECK: [[INDEX2:.LCPI[0-9_]+]]:
     64 ; CHECK: .long   82002
     65 ; CHECK: [[INDEX3:.LCPI[0-9_]+]]:
     66 ; CHECK: .long   83002
     67 ; CHECK: [[INDEX4:.LCPI[0-9_]+]]:
     68 ; CHECK: .long   84002
     69 ; CHECK: .text
     70 ; !FP + large frame: spill SR+SR = entsp 2 + 100000
     71 ; CHECK-LABEL: ScavengeSlots:
     72 ; CHECK: entsp 65535
     73 ; CHECK: extsp 34467
     74 ; scavenge r11
     75 ; CHECK: ldaw r11, sp[0]
     76 ; scavenge r4 using SR spill slot
     77 ; CHECK: stw r4, sp[1]
     78 ; CHECK: ldw r4, cp{{\[}}[[ARG5]]{{\]}}
     79 ; r11 used to load 5th argument
     80 ; CHECK: ldw r11, r11[r4]
     81 ; CHECK: ldaw r4, sp[0]
     82 ; scavenge r5 using SR spill slot
     83 ; CHECK: stw r5, sp[0]
     84 ; CHECK: ldw r5, cp{{\[}}[[INDEX0]]{{\]}}
     85 ; r4 & r5 used by InsertSPConstInst() to emit STW_l3r instruction.
     86 ; CHECK: stw r0, r4[r5]
     87 ; CHECK: ldaw r0, sp[0]
     88 ; CHECK: ldw r5, cp{{\[}}[[INDEX1]]{{\]}}
     89 ; CHECK: stw r1, r0[r5]
     90 ; CHECK: ldaw r0, sp[0]
     91 ; CHECK: ldw r1, cp{{\[}}[[INDEX2]]{{\]}}
     92 ; CHECK: stw r2, r0[r1]
     93 ; CHECK: ldaw r0, sp[0]
     94 ; CHECK: ldw r1, cp{{\[}}[[INDEX3]]{{\]}}
     95 ; CHECK: stw r3, r0[r1]
     96 ; CHECK: ldaw r0, sp[0]
     97 ; CHECK: ldw r1, cp{{\[}}[[INDEX4]]{{\]}}
     98 ; CHECK: stw r11, r0[r1]
     99 ; CHECK: ldaw sp, sp[65535]
    100 ; CHECK: ldw r4, sp[1]
    101 ; CHECK: ldw r5, sp[0]
    102 ; CHECK: retsp 34467
    103 define void @ScavengeSlots(i32 %r0, i32 %r1, i32 %r2, i32 %r3, i32 %r4) nounwind {
    104 entry:
    105   %Data = alloca [100000 x i32]
    106   %i0 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 80000
    107   store volatile i32 %r0, i32* %i0
    108   %i1 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 81000
    109   store volatile i32 %r1, i32* %i1
    110   %i2 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 82000
    111   store volatile i32 %r2, i32* %i2
    112   %i3 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 83000
    113   store volatile i32 %r3, i32* %i3
    114   %i4 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 84000
    115   store volatile i32 %r4, i32* %i4
    116   ret void
    117 }
    118