1 ; RUN: llc < %s -march=xcore | FileCheck %s 2 3 define void @_Z1fz(...) { 4 entry: 5 ; CHECK-LABEL: _Z1fz: 6 ; CHECK: extsp 3 7 ; CHECK: stw r[[REG:[0-3]{1,1}]] 8 ; CHECK: , sp{{\[}}[[REG]]{{\]}} 9 ; CHECK: stw r[[REG:[0-3]{1,1}]] 10 ; CHECK: , sp{{\[}}[[REG]]{{\]}} 11 ; CHECK: stw r[[REG:[0-3]{1,1}]] 12 ; CHECK: , sp{{\[}}[[REG]]{{\]}} 13 ; CHECK: stw r[[REG:[0-3]{1,1}]] 14 ; CHECK: , sp{{\[}}[[REG]]{{\]}} 15 ; CHECK: ldaw sp, sp[3] 16 ; CHECK: retsp 0 17 ret void 18 } 19 20 21 declare void @llvm.va_start(i8*) nounwind 22 declare void @llvm.va_end(i8*) nounwind 23 declare void @f(i32) nounwind 24 define void @test_vararg(...) nounwind { 25 entry: 26 ; CHECK-LABEL: test_vararg 27 ; CHECK: extsp 6 28 ; CHECK: stw lr, sp[1] 29 ; CHECK: stw r0, sp[3] 30 ; CHECK: stw r1, sp[4] 31 ; CHECK: stw r2, sp[5] 32 ; CHECK: stw r3, sp[6] 33 ; CHECK: ldaw r0, sp[3] 34 ; CHECK: stw r0, sp[2] 35 %list = alloca i8*, align 4 36 %list1 = bitcast i8** %list to i8* 37 call void @llvm.va_start(i8* %list1) 38 br label %for.cond 39 40 ; CHECK-LABEL: .LBB1_1 41 ; CHECK: ldw r0, sp[2] 42 ; CHECK: add r1, r0, 4 43 ; CHECK: stw r1, sp[2] 44 ; CHECK: ldw r0, r0[0] 45 ; CHECK: bl f 46 ; CHECK: bu .LBB1_1 47 for.cond: 48 %0 = va_arg i8** %list, i32 49 call void @f(i32 %0) 50 br label %for.cond 51 52 call void @llvm.va_end(i8* %list1) 53 ret void 54 } 55 56
