1 ; RUN: opt < %s -msan -S | FileCheck %s 2 3 target datalayout = "E-m:e-i64:64-n32:64" 4 target triple = "powerpc64--linux" 5 6 define i32 @foo(i32 %guard, ...) { 7 %vl = alloca i8*, align 8 8 %1 = bitcast i8** %vl to i8* 9 call void @llvm.lifetime.start(i64 32, i8* %1) 10 call void @llvm.va_start(i8* %1) 11 call void @llvm.va_end(i8* %1) 12 call void @llvm.lifetime.end(i64 32, i8* %1) 13 ret i32 0 14 } 15 16 ; First, check allocation of the save area. 17 18 ; CHECK-LABEL: @foo 19 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_va_arg_overflow_size_tls 20 ; CHECK: [[B:%.*]] = add i64 0, [[A]] 21 ; CHECK: [[C:%.*]] = alloca {{.*}} [[B]] 22 23 ; CHECK: [[STACK:%.*]] = bitcast {{.*}} @__msan_va_arg_tls to i8* 24 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[C]], i8* [[STACK]], i64 [[B]], i32 8, i1 false) 25 26 declare void @llvm.lifetime.start(i64, i8* nocapture) #1 27 declare void @llvm.va_start(i8*) #2 28 declare void @llvm.va_end(i8*) #2 29 declare void @llvm.lifetime.end(i64, i8* nocapture) #1 30 31 define i32 @bar() { 32 %1 = call i32 (i32, ...) @foo(i32 0, i32 1, i64 2, double 3.000000e+00) 33 ret i32 %1 34 } 35 36 ; Save the incoming shadow value from the arguments in the __msan_va_arg_tls 37 ; array. The first argument is stored at position 4, since it's right 38 ; justified. 39 ; CHECK-LABEL: @bar 40 ; CHECK: store i32 0, i32* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 4) to i32*), align 8 41 ; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to i64*), align 8 42 ; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 16) to i64*), align 8 43 ; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls 44 45 ; Check vector argument. 46 define i32 @bar2() { 47 %1 = call i32 (i32, ...) @foo(i32 0, <2 x i64> <i64 1, i64 2>) 48 ret i32 %1 49 } 50 51 ; The vector is at offset 16 of parameter save area, but __msan_va_arg_tls 52 ; corresponds to offset 8+ of parameter save area - so the offset from 53 ; __msan_va_arg_tls is actually misaligned. 54 ; CHECK-LABEL: @bar2 55 ; CHECK: store <2 x i64> zeroinitializer, <2 x i64>* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to <2 x i64>*), align 8 56 ; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls 57 58 ; Check QPX vector argument. 59 define i32 @bar3() "target-features"="+qpx" { 60 %1 = call i32 (i32, ...) @foo(i32 0, i32 1, i32 2, <4 x double> <double 1.0, double 2.0, double 3.0, double 4.0>) 61 ret i32 %1 62 } 63 64 ; That one is even stranger: the parameter save area starts at offset 48 from 65 ; (32-byte aligned) stack pointer, the vector parameter is at 96 bytes from 66 ; the stack pointer, so its offset from parameter save area is misaligned. 67 ; CHECK-LABEL: @bar3 68 ; CHECK: store i32 0, i32* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 4) to i32*), align 8 69 ; CHECK: store i32 0, i32* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 12) to i32*), align 8 70 ; CHECK: store <4 x i64> zeroinitializer, <4 x i64>* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 40) to <4 x i64>*), align 8 71 ; CHECK: store {{.*}} 72, {{.*}} @__msan_va_arg_overflow_size_tls 72 73 ; Check i64 array. 74 define i32 @bar4() { 75 %1 = call i32 (i32, ...) @foo(i32 0, [2 x i64] [i64 1, i64 2]) 76 ret i32 %1 77 } 78 79 ; CHECK-LABEL: @bar4 80 ; CHECK: store [2 x i64] zeroinitializer, [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*), align 8 81 ; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls 82 83 ; Check i128 array. 84 define i32 @bar5() { 85 %1 = call i32 (i32, ...) @foo(i32 0, [2 x i128] [i128 1, i128 2]) 86 ret i32 %1 87 } 88 89 ; CHECK-LABEL: @bar5 90 ; CHECK: store [2 x i128] zeroinitializer, [2 x i128]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [2 x i128]*), align 8 91 ; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls 92 93 ; Check 8-aligned byval. 94 define i32 @bar6([2 x i64]* %arg) { 95 %1 = call i32 (i32, ...) @foo(i32 0, [2 x i64]* byval align 8 %arg) 96 ret i32 %1 97 } 98 99 ; CHECK-LABEL: @bar6 100 ; CHECK: [[SHADOW:%[0-9]+]] = bitcast [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*) to i8* 101 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHADOW]], i8* {{.*}}, i64 16, i32 8, i1 false) 102 ; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls 103 104 ; Check 16-aligned byval. 105 define i32 @bar7([4 x i64]* %arg) { 106 %1 = call i32 (i32, ...) @foo(i32 0, [4 x i64]* byval align 16 %arg) 107 ret i32 %1 108 } 109 110 ; CHECK-LABEL: @bar7 111 ; CHECK: [[SHADOW:%[0-9]+]] = bitcast [4 x i64]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [4 x i64]*) 112 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHADOW]], i8* {{.*}}, i64 32, i32 8, i1 false) 113 ; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls 114
