1 ; RUN: opt < %s -msan -S | FileCheck %s 2 3 target datalayout = "e-m:e-i64:64-n32:64" 4 target triple = "powerpc64le--linux" 5 6 define i32 @foo(i32 %guard, ...) { 7 %vl = alloca i8*, align 8 8 %1 = bitcast i8** %vl to i8* 9 call void @llvm.lifetime.start(i64 32, i8* %1) 10 call void @llvm.va_start(i8* %1) 11 call void @llvm.va_end(i8* %1) 12 call void @llvm.lifetime.end(i64 32, i8* %1) 13 ret i32 0 14 } 15 16 ; First, check allocation of the save area. 17 18 ; CHECK-LABEL: @foo 19 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_va_arg_overflow_size_tls 20 ; CHECK: [[B:%.*]] = add i64 0, [[A]] 21 ; CHECK: [[C:%.*]] = alloca {{.*}} [[B]] 22 23 ; CHECK: [[STACK:%.*]] = bitcast {{.*}} @__msan_va_arg_tls to i8* 24 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[C]], i8* [[STACK]], i64 [[B]], i32 8, i1 false) 25 26 declare void @llvm.lifetime.start(i64, i8* nocapture) #1 27 declare void @llvm.va_start(i8*) #2 28 declare void @llvm.va_end(i8*) #2 29 declare void @llvm.lifetime.end(i64, i8* nocapture) #1 30 31 define i32 @bar() { 32 %1 = call i32 (i32, ...) @foo(i32 0, i32 1, i64 2, double 3.000000e+00) 33 ret i32 %1 34 } 35 36 ; Save the incoming shadow value from the arguments in the __msan_va_arg_tls 37 ; array. 38 ; CHECK-LABEL: @bar 39 ; CHECK: store i32 0, i32* bitcast ([100 x i64]* @__msan_va_arg_tls to i32*), align 8 40 ; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to i64*), align 8 41 ; CHECK: store i64 0, i64* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 16) to i64*), align 8 42 ; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls 43 44 ; Check vector argument. 45 define i32 @bar2() { 46 %1 = call i32 (i32, ...) @foo(i32 0, <2 x i64> <i64 1, i64 2>) 47 ret i32 %1 48 } 49 50 ; The vector is at offset 16 of parameter save area, but __msan_va_arg_tls 51 ; corresponds to offset 8+ of parameter save area - so the offset from 52 ; __msan_va_arg_tls is actually misaligned. 53 ; CHECK-LABEL: @bar2 54 ; CHECK: store <2 x i64> zeroinitializer, <2 x i64>* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to <2 x i64>*), align 8 55 ; CHECK: store {{.*}} 24, {{.*}} @__msan_va_arg_overflow_size_tls 56 57 ; Check i64 array. 58 define i32 @bar4() { 59 %1 = call i32 (i32, ...) @foo(i32 0, [2 x i64] [i64 1, i64 2]) 60 ret i32 %1 61 } 62 63 ; CHECK-LABEL: @bar4 64 ; CHECK: store [2 x i64] zeroinitializer, [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*), align 8 65 ; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls 66 67 ; Check i128 array. 68 define i32 @bar5() { 69 %1 = call i32 (i32, ...) @foo(i32 0, [2 x i128] [i128 1, i128 2]) 70 ret i32 %1 71 } 72 73 ; CHECK-LABEL: @bar5 74 ; CHECK: store [2 x i128] zeroinitializer, [2 x i128]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [2 x i128]*), align 8 75 ; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls 76 77 ; Check 8-aligned byval. 78 define i32 @bar6([2 x i64]* %arg) { 79 %1 = call i32 (i32, ...) @foo(i32 0, [2 x i64]* byval align 8 %arg) 80 ret i32 %1 81 } 82 83 ; CHECK-LABEL: @bar6 84 ; CHECK: [[SHADOW:%[0-9]+]] = bitcast [2 x i64]* bitcast ([100 x i64]* @__msan_va_arg_tls to [2 x i64]*) to i8* 85 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHADOW]], i8* {{.*}}, i64 16, i32 8, i1 false) 86 ; CHECK: store {{.*}} 16, {{.*}} @__msan_va_arg_overflow_size_tls 87 88 ; Check 16-aligned byval. 89 define i32 @bar7([4 x i64]* %arg) { 90 %1 = call i32 (i32, ...) @foo(i32 0, [4 x i64]* byval align 16 %arg) 91 ret i32 %1 92 } 93 94 ; CHECK-LABEL: @bar7 95 ; CHECK: [[SHADOW:%[0-9]+]] = bitcast [4 x i64]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 8) to [4 x i64]*) 96 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHADOW]], i8* {{.*}}, i64 32, i32 8, i1 false) 97 ; CHECK: store {{.*}} 40, {{.*}} @__msan_va_arg_overflow_size_tls 98
