1 ; RUN: opt -licm -disable-output < %s 2 ; RUN: opt -aa-pipeline=basic-aa -passes='require<aa>,require<targetir>,require<scalar-evolution>,loop(licm)' -disable-output < %s 3 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 5 target triple = "x86_64-apple-darwin10.0.0" 6 7 8 ; PR8068 9 @g_12 = external global i8, align 1 10 define void @test1() nounwind ssp { 11 entry: 12 br label %for.body 13 14 for.body: ; preds = %for.cond, %bb.nph 15 store i8 0, i8* @g_12, align 1 16 %tmp6 = load i8, i8* @g_12, align 1 17 br label %for.cond 18 19 for.cond: ; preds = %for.body 20 store i8 %tmp6, i8* @g_12, align 1 21 br i1 false, label %for.cond.for.end10_crit_edge, label %for.body 22 23 for.cond.for.end10_crit_edge: ; preds = %for.cond 24 br label %for.end10 25 26 for.end10: ; preds = %for.cond.for.end10_crit_edge, %entry 27 ret void 28 } 29 30 ; PR8067 31 @g_8 = external global i32, align 4 32 33 define void @test2() noreturn nounwind ssp { 34 entry: 35 br label %for.body 36 37 for.body: ; preds = %for.body, %entry 38 %tmp7 = load i32, i32* @g_8, align 4 39 store i32* @g_8, i32** undef, align 16 40 store i32 undef, i32* @g_8, align 4 41 br label %for.body 42 } 43 44 ; PR8102 45 define void @test3() { 46 entry: 47 %__first = alloca { i32* } 48 br i1 undef, label %for.cond, label %for.end 49 50 for.cond: ; preds = %for.cond, %entry 51 %tmp1 = getelementptr { i32*}, { i32*}* %__first, i32 0, i32 0 52 %tmp2 = load i32*, i32** %tmp1, align 4 53 %call = tail call i32* @test3helper(i32* %tmp2) 54 %tmp3 = getelementptr { i32*}, { i32*}* %__first, i32 0, i32 0 55 store i32* %call, i32** %tmp3, align 4 56 br i1 false, label %for.cond, label %for.end 57 58 for.end: ; preds = %for.cond, %entry 59 ret void 60 } 61 62 declare i32* @test3helper(i32*) 63 64 65 ; PR8602 66 @g_47 = external global i32, align 4 67 68 define void @test4() noreturn nounwind { 69 br label %1 70 71 ; <label>:1 ; preds = %1, %0 72 store volatile i32* @g_47, i32** undef, align 8 73 store i32 undef, i32* @g_47, align 4 74 br label %1 75 } 76
