1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the main function for LLVM's TableGen. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "TableGenBackends.h" // Declares all backends. 15 #include "llvm/Support/CommandLine.h" 16 #include "llvm/Support/ManagedStatic.h" 17 #include "llvm/Support/PrettyStackTrace.h" 18 #include "llvm/Support/Signals.h" 19 #include "llvm/TableGen/Error.h" 20 #include "llvm/TableGen/Main.h" 21 #include "llvm/TableGen/Record.h" 22 #include "llvm/TableGen/SetTheory.h" 23 24 using namespace llvm; 25 26 enum ActionType { 27 PrintRecords, 28 GenEmitter, 29 GenRegisterInfo, 30 GenInstrInfo, 31 GenAsmWriter, 32 GenAsmMatcher, 33 GenDisassembler, 34 GenPseudoLowering, 35 GenCallingConv, 36 GenDAGISel, 37 GenDFAPacketizer, 38 GenFastISel, 39 GenSubtarget, 40 GenIntrinsic, 41 GenTgtIntrinsic, 42 PrintEnums, 43 PrintSets, 44 GenOptParserDefs, 45 GenCTags, 46 GenAttributes, 47 GenSearchableTables, 48 }; 49 50 namespace { 51 cl::opt<ActionType> 52 Action(cl::desc("Action to perform:"), 53 cl::values(clEnumValN(PrintRecords, "print-records", 54 "Print all records to stdout (default)"), 55 clEnumValN(GenEmitter, "gen-emitter", 56 "Generate machine code emitter"), 57 clEnumValN(GenRegisterInfo, "gen-register-info", 58 "Generate registers and register classes info"), 59 clEnumValN(GenInstrInfo, "gen-instr-info", 60 "Generate instruction descriptions"), 61 clEnumValN(GenCallingConv, "gen-callingconv", 62 "Generate calling convention descriptions"), 63 clEnumValN(GenAsmWriter, "gen-asm-writer", 64 "Generate assembly writer"), 65 clEnumValN(GenDisassembler, "gen-disassembler", 66 "Generate disassembler"), 67 clEnumValN(GenPseudoLowering, "gen-pseudo-lowering", 68 "Generate pseudo instruction lowering"), 69 clEnumValN(GenAsmMatcher, "gen-asm-matcher", 70 "Generate assembly instruction matcher"), 71 clEnumValN(GenDAGISel, "gen-dag-isel", 72 "Generate a DAG instruction selector"), 73 clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer", 74 "Generate DFA Packetizer for VLIW targets"), 75 clEnumValN(GenFastISel, "gen-fast-isel", 76 "Generate a \"fast\" instruction selector"), 77 clEnumValN(GenSubtarget, "gen-subtarget", 78 "Generate subtarget enumerations"), 79 clEnumValN(GenIntrinsic, "gen-intrinsic", 80 "Generate intrinsic information"), 81 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", 82 "Generate target intrinsic information"), 83 clEnumValN(PrintEnums, "print-enums", 84 "Print enum values for a class"), 85 clEnumValN(PrintSets, "print-sets", 86 "Print expanded sets for testing DAG exprs"), 87 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", 88 "Generate option definitions"), 89 clEnumValN(GenCTags, "gen-ctags", 90 "Generate ctags-compatible index"), 91 clEnumValN(GenAttributes, "gen-attrs", 92 "Generate attributes"), 93 clEnumValN(GenSearchableTables, "gen-searchable-tables", 94 "Generate generic binary-searchable table"), 95 clEnumValEnd)); 96 97 cl::opt<std::string> 98 Class("class", cl::desc("Print Enum list for this class"), 99 cl::value_desc("class name")); 100 101 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { 102 switch (Action) { 103 case PrintRecords: 104 OS << Records; // No argument, dump all contents 105 break; 106 case GenEmitter: 107 EmitCodeEmitter(Records, OS); 108 break; 109 case GenRegisterInfo: 110 EmitRegisterInfo(Records, OS); 111 break; 112 case GenInstrInfo: 113 EmitInstrInfo(Records, OS); 114 break; 115 case GenCallingConv: 116 EmitCallingConv(Records, OS); 117 break; 118 case GenAsmWriter: 119 EmitAsmWriter(Records, OS); 120 break; 121 case GenAsmMatcher: 122 EmitAsmMatcher(Records, OS); 123 break; 124 case GenDisassembler: 125 EmitDisassembler(Records, OS); 126 break; 127 case GenPseudoLowering: 128 EmitPseudoLowering(Records, OS); 129 break; 130 case GenDAGISel: 131 EmitDAGISel(Records, OS); 132 break; 133 case GenDFAPacketizer: 134 EmitDFAPacketizer(Records, OS); 135 break; 136 case GenFastISel: 137 EmitFastISel(Records, OS); 138 break; 139 case GenSubtarget: 140 EmitSubtarget(Records, OS); 141 break; 142 case GenIntrinsic: 143 EmitIntrinsics(Records, OS); 144 break; 145 case GenTgtIntrinsic: 146 EmitIntrinsics(Records, OS, true); 147 break; 148 case GenOptParserDefs: 149 EmitOptParser(Records, OS); 150 break; 151 case PrintEnums: 152 { 153 for (Record *Rec : Records.getAllDerivedDefinitions(Class)) 154 OS << Rec->getName() << ", "; 155 OS << "\n"; 156 break; 157 } 158 case PrintSets: 159 { 160 SetTheory Sets; 161 Sets.addFieldExpander("Set", "Elements"); 162 for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { 163 OS << Rec->getName() << " = ["; 164 const std::vector<Record*> *Elts = Sets.expand(Rec); 165 assert(Elts && "Couldn't expand Set instance"); 166 for (Record *Elt : *Elts) 167 OS << ' ' << Elt->getName(); 168 OS << " ]\n"; 169 } 170 break; 171 } 172 case GenCTags: 173 EmitCTags(Records, OS); 174 break; 175 case GenAttributes: 176 EmitAttributes(Records, OS); 177 break; 178 case GenSearchableTables: 179 EmitSearchableTables(Records, OS); 180 break; 181 } 182 183 return false; 184 } 185 } 186 187 int main(int argc, char **argv) { 188 sys::PrintStackTraceOnErrorSignal(argv[0]); 189 PrettyStackTraceProgram X(argc, argv); 190 cl::ParseCommandLineOptions(argc, argv); 191 192 llvm_shutdown_obj Y; 193 194 return TableGenMain(argv[0], &LLVMTableGenMain); 195 } 196 197 #ifdef __has_feature 198 #if __has_feature(address_sanitizer) 199 #include <sanitizer/lsan_interface.h> 200 // Disable LeakSanitizer for this binary as it has too many leaks that are not 201 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h . 202 int __lsan_is_turned_off() { return 1; } 203 #endif // __has_feature(address_sanitizer) 204 #endif // defined(__has_feature) 205
