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      1 /****************************************************************************
      2 * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice (including the next
     12 * paragraph) shall be included in all copies or substantial portions of the
     13 * Software.
     14 *
     15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21 * IN THE SOFTWARE.
     22 ****************************************************************************/
     23 #if !defined(__SIMD_LIB_AVX512_HPP__)
     24 #error Do not include this file directly, use "simdlib.hpp" instead.
     25 #endif
     26 
     27 //============================================================================
     28 // SIMD16 AVX512 (F) implementation for Knights Family Processors
     29 //
     30 //============================================================================
     31 
     32 #define SIMD_WRAPPER_1_(op, intrin)  \
     33     static SIMDINLINE Float SIMDCALL op(Float a)   \
     34     {\
     35         return intrin(a);\
     36     }
     37 
     38 #define SIMD_WRAPPER_1(op)  \
     39     SIMD_WRAPPER_1_(op, _mm512_##op)
     40 
     41 #define SIMD_WRAPPER_2_(op, intrin)  \
     42     static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
     43     {\
     44         return _mm512_##intrin(a, b);\
     45     }
     46 #define SIMD_WRAPPER_2(op) SIMD_WRAPPER_2_(op, op)
     47 
     48 #define SIMD_WRAPPERI_2_(op, intrin)  \
     49     static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
     50     {\
     51         return _mm512_castsi512_ps(_mm512_##intrin(\
     52             _mm512_castps_si512(a), _mm512_castps_si512(b)));\
     53     }
     54 
     55 #define SIMD_DWRAPPER_2(op)  \
     56     static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
     57     {\
     58         return _mm512_##op(a, b);\
     59     }
     60 
     61 #define SIMD_WRAPPER_2I_(op, intrin)  \
     62     template<int ImmT>\
     63     static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
     64     {\
     65         return _mm512_##intrin(a, b, ImmT);\
     66     }
     67 #define SIMD_WRAPPER_2I(op)  SIMD_WRAPPER_2I_(op, op)
     68 
     69 #define SIMD_DWRAPPER_2I_(op, intrin)  \
     70     template<int ImmT>\
     71     static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
     72     {\
     73         return _mm512_##intrin(a, b, ImmT);\
     74     }
     75 #define SIMD_DWRAPPER_2I(op)  SIMD_DWRAPPER_2I_(op, op)
     76 
     77 #define SIMD_WRAPPER_3(op)  \
     78     static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c)   \
     79     {\
     80         return _mm512_##op(a, b, c);\
     81     }
     82 
     83 #define SIMD_IWRAPPER_1(op)  \
     84     static SIMDINLINE Integer SIMDCALL op(Integer a)   \
     85     {\
     86         return _mm512_##op(a);\
     87     }
     88 #define SIMD_IWRAPPER_1_8(op)  \
     89     static SIMDINLINE Integer SIMDCALL op(SIMD256Impl::Integer a)   \
     90     {\
     91         return _mm512_##op(a);\
     92     }
     93 
     94 #define SIMD_IWRAPPER_1_4(op)  \
     95     static SIMDINLINE Integer SIMDCALL op(SIMD128Impl::Integer a)   \
     96     {\
     97         return _mm512_##op(a);\
     98     }
     99 
    100 #define SIMD_IWRAPPER_1I_(op, intrin)  \
    101     template<int ImmT> \
    102     static SIMDINLINE Integer SIMDCALL op(Integer a)   \
    103     {\
    104         return intrin(a, ImmT);\
    105     }
    106 #define SIMD_IWRAPPER_1I(op) SIMD_IWRAPPER_1I_(op, _mm512_##op)
    107 
    108 #define SIMD_IWRAPPER_2_(op, intrin)  \
    109     static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
    110     {\
    111         return _mm512_##intrin(a, b);\
    112     }
    113 #define SIMD_IWRAPPER_2(op)  SIMD_IWRAPPER_2_(op, op)
    114 
    115 #define SIMD_IWRAPPER_2_CMP(op, cmp)  \
    116     static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
    117     {\
    118         return cmp(a, b);\
    119     }
    120 
    121 #define SIMD_IFWRAPPER_2(op, intrin)  \
    122     static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
    123     {\
    124         return castps_si(_mm512_##intrin(castsi_ps(a), castsi_ps(b)) );\
    125     }
    126 
    127 #define SIMD_IWRAPPER_2I_(op, intrin)  \
    128     template<int ImmT>\
    129     static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
    130     {\
    131         return _mm512_##intrin(a, b, ImmT);\
    132     }
    133 #define SIMD_IWRAPPER_2I(op) SIMD_IWRAPPER_2I_(op, op)
    134 
    135 SIMD_WRAPPERI_2_(and_ps, and_epi32);          // return a & b       (float treated as int)
    136 SIMD_WRAPPERI_2_(andnot_ps, andnot_epi32);    // return (~a) & b    (float treated as int)
    137 SIMD_WRAPPERI_2_(or_ps, or_epi32);            // return a | b       (float treated as int)
    138 SIMD_WRAPPERI_2_(xor_ps, xor_epi32);          // return a ^ b       (float treated as int)
    139 
    140 #undef SIMD_WRAPPER_1_
    141 #undef SIMD_WRAPPER_1
    142 #undef SIMD_WRAPPER_2
    143 #undef SIMD_WRAPPER_2_
    144 #undef SIMD_WRAPPERI_2_
    145 #undef SIMD_DWRAPPER_2
    146 #undef SIMD_DWRAPPER_2I
    147 #undef SIMD_WRAPPER_2I_
    148 #undef SIMD_WRAPPER_3_
    149 #undef SIMD_WRAPPER_2I
    150 #undef SIMD_WRAPPER_3
    151 #undef SIMD_IWRAPPER_1
    152 #undef SIMD_IWRAPPER_2
    153 #undef SIMD_IFWRAPPER_2
    154 #undef SIMD_IWRAPPER_2I
    155 #undef SIMD_IWRAPPER_1
    156 #undef SIMD_IWRAPPER_1I
    157 #undef SIMD_IWRAPPER_1I_
    158 #undef SIMD_IWRAPPER_2
    159 #undef SIMD_IWRAPPER_2_
    160 #undef SIMD_IWRAPPER_2I
    161 
    162