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      1  /*
      2  * Copyright  2007 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  *
     23  * Authors:
     24  *    Eric Anholt <eric (at) anholt.net>
     25  *
     26  */
     27 
     28 #define PCI_CHIP_I810			0x7121
     29 #define PCI_CHIP_I810_DC100		0x7123
     30 #define PCI_CHIP_I810_E			0x7125
     31 #define PCI_CHIP_I815			0x1132
     32 
     33 #define PCI_CHIP_I830_M			0x3577
     34 #define PCI_CHIP_845_G			0x2562
     35 #define PCI_CHIP_I855_GM		0x3582
     36 #define PCI_CHIP_I865_G			0x2572
     37 
     38 #define PCI_CHIP_I915_G			0x2582
     39 #define PCI_CHIP_E7221_G		0x258A
     40 #define PCI_CHIP_I915_GM		0x2592
     41 #define PCI_CHIP_I945_G			0x2772
     42 #define PCI_CHIP_I945_GM		0x27A2
     43 #define PCI_CHIP_I945_GME		0x27AE
     44 
     45 #define PCI_CHIP_Q35_G			0x29B2
     46 #define PCI_CHIP_G33_G			0x29C2
     47 #define PCI_CHIP_Q33_G			0x29D2
     48 
     49 #define PCI_CHIP_PNV_GM			0xA011
     50 #define PCI_CHIP_PNV_G			0xA001
     51 
     52 #define IS_945(devid)		(devid == PCI_CHIP_I945_G || \
     53 				 devid == PCI_CHIP_I945_GM || \
     54 				 devid == PCI_CHIP_I945_GME || \
     55 				 devid == PCI_CHIP_G33_G || \
     56 				 devid == PCI_CHIP_Q33_G || \
     57 				 devid == PCI_CHIP_Q35_G || \
     58 				 devid == PCI_CHIP_PNV_G || \
     59 				 devid == PCI_CHIP_PNV_GM)
     60 
     61 #define IS_GEN3(devid)		(devid == PCI_CHIP_I915_G || \
     62 				 devid == PCI_CHIP_E7221_G || \
     63 				 devid == PCI_CHIP_I915_GM || \
     64 				 IS_945(devid))
     65