1 /* 2 * Copyright 2009 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric (at) anholt.net> 25 * 26 */ 27 28 #include "main/macros.h" 29 #include "intel_batchbuffer.h" 30 #include "brw_context.h" 31 #include "brw_state.h" 32 #include "brw_defines.h" 33 34 /** 35 * When the GS is not in use, we assign the entire URB space to the VS. When 36 * the GS is in use, we split the URB space evenly between the VS and the GS. 37 * This is not ideal, but it's simple. 38 * 39 * URB size / 2 URB size / 2 40 * _____________-______________ _____________-______________ 41 * / \ / \ 42 * +-------------------------------------------------------------+ 43 * | Vertex Shader Entries | Geometry Shader Entries | 44 * +-------------------------------------------------------------+ 45 * 46 * Sandybridge GT1 has 32kB of URB space, while GT2 has 64kB. 47 * (See the Sandybridge PRM, Volume 2, Part 1, Section 1.4.7: 3DSTATE_URB.) 48 */ 49 void 50 gen6_upload_urb(struct brw_context *brw, unsigned vs_size, 51 bool gs_present, unsigned gs_size) 52 { 53 int nr_vs_entries, nr_gs_entries; 54 int total_urb_size = brw->urb.size * 1024; /* in bytes */ 55 const struct gen_device_info *devinfo = &brw->screen->devinfo; 56 57 /* Calculate how many entries fit in each stage's section of the URB */ 58 if (gs_present) { 59 nr_vs_entries = (total_urb_size/2) / (vs_size * 128); 60 nr_gs_entries = (total_urb_size/2) / (gs_size * 128); 61 } else { 62 nr_vs_entries = total_urb_size / (vs_size * 128); 63 nr_gs_entries = 0; 64 } 65 66 /* Then clamp to the maximum allowed by the hardware */ 67 if (nr_vs_entries > devinfo->urb.max_entries[MESA_SHADER_VERTEX]) 68 nr_vs_entries = devinfo->urb.max_entries[MESA_SHADER_VERTEX]; 69 70 if (nr_gs_entries > devinfo->urb.max_entries[MESA_SHADER_GEOMETRY]) 71 nr_gs_entries = devinfo->urb.max_entries[MESA_SHADER_GEOMETRY]; 72 73 /* Finally, both must be a multiple of 4 (see 3DSTATE_URB in the PRM). */ 74 brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4); 75 brw->urb.nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, 4); 76 77 assert(brw->urb.nr_vs_entries >= 78 devinfo->urb.min_entries[MESA_SHADER_VERTEX]); 79 assert(brw->urb.nr_vs_entries % 4 == 0); 80 assert(brw->urb.nr_gs_entries % 4 == 0); 81 assert(vs_size <= 5); 82 assert(gs_size <= 5); 83 84 BEGIN_BATCH(3); 85 OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2)); 86 OUT_BATCH(((vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) | 87 ((brw->urb.nr_vs_entries) << GEN6_URB_VS_ENTRIES_SHIFT)); 88 OUT_BATCH(((gs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) | 89 ((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT)); 90 ADVANCE_BATCH(); 91 92 /* From the PRM Volume 2 part 1, section 1.4.7: 93 * 94 * Because of a urb corruption caused by allocating a previous gsunits 95 * urb entry to vsunit software is required to send a "GS NULL 96 * Fence"(Send URB fence with VS URB size == 1 and GS URB size == 0) plus 97 * a dummy DRAW call before any case where VS will be taking over GS URB 98 * space. 99 * 100 * It is not clear exactly what this means ("URB fence" is a command that 101 * doesn't exist on Gen6). So for now we just do a full pipeline flush as 102 * a workaround. 103 */ 104 if (brw->urb.gs_present && !gs_present) 105 brw_emit_mi_flush(brw); 106 brw->urb.gs_present = gs_present; 107 } 108 109 static void 110 upload_urb(struct brw_context *brw) 111 { 112 /* BRW_NEW_VS_PROG_DATA */ 113 const struct brw_vue_prog_data *vs_vue_prog_data = 114 brw_vue_prog_data(brw->vs.base.prog_data); 115 const unsigned vs_size = MAX2(vs_vue_prog_data->urb_entry_size, 1); 116 117 /* BRW_NEW_GEOMETRY_PROGRAM, BRW_NEW_GS_PROG_DATA */ 118 const bool gs_present = 119 brw->ff_gs.prog_active || brw->programs[MESA_SHADER_GEOMETRY]; 120 121 /* Whe using GS to do transform feedback only we use the same VUE layout for 122 * VS outputs and GS outputs (as it's what the SF and Clipper expect), so we 123 * can simply make the GS URB entry size the same as for the VS. This may 124 * technically be too large in cases where we have few vertex attributes and 125 * a lot of varyings, since the VS size is determined by the larger of the 126 * two. For now, it's safe. 127 * 128 * For user-provided GS the assumption above does not hold since the GS 129 * outputs can be different from the VS outputs. 130 */ 131 unsigned gs_size = vs_size; 132 if (brw->programs[MESA_SHADER_GEOMETRY]) { 133 const struct brw_vue_prog_data *gs_vue_prog_data = 134 brw_vue_prog_data(brw->gs.base.prog_data); 135 gs_size = gs_vue_prog_data->urb_entry_size; 136 assert(gs_size >= 1); 137 } 138 139 gen6_upload_urb(brw, vs_size, gs_present, gs_size); 140 } 141 142 const struct brw_tracked_state gen6_urb = { 143 .dirty = { 144 .mesa = 0, 145 .brw = BRW_NEW_BLORP | 146 BRW_NEW_CONTEXT | 147 BRW_NEW_FF_GS_PROG_DATA | 148 BRW_NEW_GEOMETRY_PROGRAM | 149 BRW_NEW_GS_PROG_DATA | 150 BRW_NEW_VS_PROG_DATA, 151 }, 152 .emit = upload_urb, 153 }; 154