1 ; RUN: llvm-as %s -o %t.bc 2 ; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt 3 ; RUN: FileCheck < %t.txt %s --check-prefix=CHECK-SPIRV 4 ; RUN: llvm-spirv %t.bc -o %t.spv 5 ; RUN: llvm-spirv -r %t.spv -o %t.rev.bc 6 ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM 7 8 ; CHECK-LLVM: call spir_func i32 @_Z8isfinitef( 9 ; CHECK-LLVM: call spir_func i32 @_Z5isnanf( 10 ; CHECK-LLVM: call spir_func i32 @_Z5isinff( 11 ; CHECK-LLVM: call spir_func i32 @_Z8isnormalf( 12 ; CHECK-LLVM: call spir_func i32 @_Z7signbitf( 13 14 ; CHECK-LLVM: call spir_func <2 x i32> @_Z8isfiniteDv2_f( 15 ; CHECK-LLVM: call spir_func <2 x i32> @_Z5isnanDv2_f( 16 ; CHECK-LLVM: call spir_func <2 x i32> @_Z5isinfDv2_f( 17 ; CHECK-LLVM: call spir_func <2 x i32> @_Z8isnormalDv2_f( 18 19 ; CHECK-SPIRV: 2 TypeBool [[BoolTypeID:[0-9]+]] 20 ; CHECK-SPIRV: 4 TypeVector [[BoolVectorTypeID:[0-9]+]] [[BoolTypeID]] 2 21 22 ; CHECK-SPIRV: 4 IsFinite [[BoolTypeID]] 23 ; CHECK-SPIRV: 4 IsNan [[BoolTypeID]] 24 ; CHECK-SPIRV: 4 IsInf [[BoolTypeID]] 25 ; CHECK-SPIRV: 4 IsNormal [[BoolTypeID]] 26 ; CHECK-SPIRV: 4 SignBitSet [[BoolTypeID]] 27 28 ; CHECK-SPIRV: 4 IsFinite [[BoolVectorTypeID]] 29 ; CHECK-SPIRV: 4 IsNan [[BoolVectorTypeID]] 30 ; CHECK-SPIRV: 4 IsInf [[BoolVectorTypeID]] 31 ; CHECK-SPIRV: 4 IsNormal [[BoolVectorTypeID]] 32 33 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024" 34 target triple = "spir-unknown-unknown" 35 36 ; Function Attrs: nounwind 37 define spir_kernel void @test_scalar(i32 addrspace(1)* nocapture %out, float %f) #0 { 38 entry: 39 %call = tail call spir_func i32 @_Z8isfinitef(float %f) #2 40 %call1 = tail call spir_func i32 @_Z5isnanf(float %f) #2 41 %add = add nsw i32 %call1, %call 42 %call2 = tail call spir_func i32 @_Z5isinff(float %f) #2 43 %add3 = add nsw i32 %add, %call2 44 %call4 = tail call spir_func i32 @_Z8isnormalf(float %f) #2 45 %add5 = add nsw i32 %add3, %call4 46 %call6 = tail call spir_func i32 @_Z7signbitf(float %f) #2 47 %add7 = add nsw i32 %add5, %call6 48 store i32 %add7, i32 addrspace(1)* %out, align 4 49 ret void 50 } 51 52 declare spir_func i32 @_Z8isfinitef(float) #1 53 54 declare spir_func i32 @_Z5isnanf(float) #1 55 56 declare spir_func i32 @_Z5isinff(float) #1 57 58 declare spir_func i32 @_Z8isnormalf(float) #1 59 60 declare spir_func i32 @_Z7signbitf(float) #1 61 62 ; Function Attrs: nounwind 63 define spir_kernel void @test_vector(<2 x i32> addrspace(1)* nocapture %out, <2 x float> %f) #0 { 64 entry: 65 %call = tail call spir_func <2 x i32> @_Z8isfiniteDv2_f(<2 x float> %f) #2 66 %call1 = tail call spir_func <2 x i32> @_Z5isnanDv2_f(<2 x float> %f) #2 67 %add = add <2 x i32> %call, %call1 68 %call2 = tail call spir_func <2 x i32> @_Z5isinfDv2_f(<2 x float> %f) #2 69 %add3 = add <2 x i32> %add, %call2 70 %call4 = tail call spir_func <2 x i32> @_Z8isnormalDv2_f(<2 x float> %f) #2 71 %add5 = add <2 x i32> %add3, %call4 72 store <2 x i32> %add5, <2 x i32> addrspace(1)* %out, align 8 73 ret void 74 } 75 76 declare spir_func <2 x i32> @_Z8isfiniteDv2_f(<2 x float>) #1 77 78 declare spir_func <2 x i32> @_Z5isnanDv2_f(<2 x float>) #1 79 80 declare spir_func <2 x i32> @_Z5isinfDv2_f(<2 x float>) #1 81 82 declare spir_func <2 x i32> @_Z8isnormalDv2_f(<2 x float>) #1 83 84 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 85 attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 86 attributes #2 = { nounwind } 87 88 !opencl.kernels = !{!0, !6} 89 !opencl.enable.FP_CONTRACT = !{} 90 !opencl.spir.version = !{!9} 91 !opencl.ocl.version = !{!10} 92 !opencl.used.extensions = !{!11} 93 !opencl.used.optional.core.features = !{!11} 94 !opencl.compiler.options = !{!11} 95 96 !0 = !{void (i32 addrspace(1)*, float)* @test_scalar, !1, !2, !3, !4, !5} 97 !1 = !{!"kernel_arg_addr_space", i32 1, i32 0} 98 !2 = !{!"kernel_arg_access_qual", !"none", !"none"} 99 !3 = !{!"kernel_arg_type", !"int*", !"float"} 100 !4 = !{!"kernel_arg_base_type", !"int*", !"float"} 101 !5 = !{!"kernel_arg_type_qual", !"", !""} 102 !6 = !{void (<2 x i32> addrspace(1)*, <2 x float>)* @test_vector, !1, !2, !7, !8, !5} 103 !7 = !{!"kernel_arg_type", !"int2*", !"float2"} 104 !8 = !{!"kernel_arg_base_type", !"int2*", !"float2"} 105 !9 = !{i32 1, i32 2} 106 !10 = !{i32 2, i32 0} 107 !11 = !{} 108
