1 //===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This is the top level entry point for the STI Cell SPU target machine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 // Get the target-independent interfaces which we are implementing. 15 // 16 include "llvm/Target/Target.td" 17 18 // Holder of code fragments (you'd think this'd already be in 19 // a td file somewhere... :-) 20 21 class CodeFrag<dag frag> { 22 dag Fragment = frag; 23 } 24 25 //===----------------------------------------------------------------------===// 26 // Register File Description 27 //===----------------------------------------------------------------------===// 28 29 include "SPURegisterInfo.td" 30 31 //===----------------------------------------------------------------------===// 32 // Instruction formats, instructions 33 //===----------------------------------------------------------------------===// 34 35 include "SPUNodes.td" 36 include "SPUOperands.td" 37 include "SPUSchedule.td" 38 include "SPUInstrFormats.td" 39 include "SPUInstrInfo.td" 40 41 //===----------------------------------------------------------------------===// 42 // Subtarget features: 43 //===----------------------------------------------------------------------===// 44 45 def DefaultProc: SubtargetFeature<"", "ProcDirective", "SPU::DEFAULT_PROC", "">; 46 def LargeMemFeature: 47 SubtargetFeature<"large_mem","UseLargeMem", "true", 48 "Use large (>256) LSA memory addressing [default = false]">; 49 50 def SPURev0 : Processor<"v0", SPUItineraries, [DefaultProc]>; 51 52 //===----------------------------------------------------------------------===// 53 // Calling convention: 54 //===----------------------------------------------------------------------===// 55 56 include "SPUCallingConv.td" 57 58 // Target: 59 60 def SPUInstrInfo : InstrInfo { 61 let isLittleEndianEncoding = 1; 62 } 63 64 def SPU : Target { 65 let InstructionSet = SPUInstrInfo; 66 } 67
