1 //===-- PTXTargetMachine.h - Define TargetMachine for PTX -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the PTX specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef PTX_TARGET_MACHINE_H 15 #define PTX_TARGET_MACHINE_H 16 17 #include "PTXISelLowering.h" 18 #include "PTXInstrInfo.h" 19 #include "PTXFrameLowering.h" 20 #include "PTXSelectionDAGInfo.h" 21 #include "PTXSubtarget.h" 22 #include "llvm/Target/TargetData.h" 23 #include "llvm/Target/TargetFrameLowering.h" 24 #include "llvm/Target/TargetMachine.h" 25 26 namespace llvm { 27 class PTXTargetMachine : public LLVMTargetMachine { 28 private: 29 const TargetData DataLayout; 30 PTXSubtarget Subtarget; // has to be initialized before FrameLowering 31 PTXFrameLowering FrameLowering; 32 PTXInstrInfo InstrInfo; 33 PTXSelectionDAGInfo TSInfo; 34 PTXTargetLowering TLInfo; 35 36 public: 37 PTXTargetMachine(const Target &T, StringRef TT, 38 StringRef CPU, StringRef FS, 39 Reloc::Model RM, CodeModel::Model CM, 40 bool is64Bit); 41 42 virtual const TargetData *getTargetData() const { return &DataLayout; } 43 44 virtual const TargetFrameLowering *getFrameLowering() const { 45 return &FrameLowering; 46 } 47 48 virtual const PTXInstrInfo *getInstrInfo() const { return &InstrInfo; } 49 virtual const TargetRegisterInfo *getRegisterInfo() const { 50 return &InstrInfo.getRegisterInfo(); } 51 52 virtual const PTXTargetLowering *getTargetLowering() const { 53 return &TLInfo; } 54 55 virtual const PTXSelectionDAGInfo* getSelectionDAGInfo() const { 56 return &TSInfo; 57 } 58 59 virtual const PTXSubtarget *getSubtargetImpl() const { return &Subtarget; } 60 61 virtual bool addInstSelector(PassManagerBase &PM, 62 CodeGenOpt::Level OptLevel); 63 virtual bool addPostRegAlloc(PassManagerBase &PM, 64 CodeGenOpt::Level OptLevel); 65 66 // We override this method to supply our own set of codegen passes. 67 virtual bool addPassesToEmitFile(PassManagerBase &, 68 formatted_raw_ostream &, 69 CodeGenFileType, 70 CodeGenOpt::Level, 71 bool = true); 72 73 // Emission of machine code through JITCodeEmitter is not supported. 74 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 75 JITCodeEmitter &, 76 CodeGenOpt::Level, 77 bool = true) { 78 return true; 79 } 80 81 // Emission of machine code through MCJIT is not supported. 82 virtual bool addPassesToEmitMC(PassManagerBase &, 83 MCContext *&, 84 raw_ostream &, 85 CodeGenOpt::Level, 86 bool = true) { 87 return true; 88 } 89 90 private: 91 92 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level, 93 bool DisableVerify, MCContext *&OutCtx); 94 }; // class PTXTargetMachine 95 96 97 class PTX32TargetMachine : public PTXTargetMachine { 98 public: 99 100 PTX32TargetMachine(const Target &T, StringRef TT, 101 StringRef CPU, StringRef FS, 102 Reloc::Model RM, CodeModel::Model CM); 103 }; // class PTX32TargetMachine 104 105 class PTX64TargetMachine : public PTXTargetMachine { 106 public: 107 108 PTX64TargetMachine(const Target &T, StringRef TT, 109 StringRef CPU, StringRef FS, 110 Reloc::Model RM, CodeModel::Model CM); 111 }; // class PTX32TargetMachine 112 113 } // namespace llvm 114 115 #endif // PTX_TARGET_MACHINE_H 116
