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      1 ; RUN: llc < %s -march=cellspu > %t1.s
      2 ; RUN: grep shufb   %t1.s | count 19
      3 ; RUN: grep {ilhu.*1799}  %t1.s | count 1
      4 ; RUN: grep {ilhu.*771}  %t1.s | count 2
      5 ; RUN: grep {ilhu.*1543}  %t1.s | count 1
      6 ; RUN: grep {ilhu.*1029}  %t1.s | count 1
      7 ; RUN: grep {ilhu.*515}  %t1.s | count 1
      8 ; RUN: grep {ilhu.*3855}  %t1.s | count 1
      9 ; RUN: grep {ilhu.*3599}  %t1.s | count 1
     10 ; RUN: grep {ilhu.*3085}  %t1.s | count 1
     11 ; RUN: grep {iohl.*3855}  %t1.s | count 1
     12 ; RUN: grep {iohl.*3599}  %t1.s | count 2
     13 ; RUN: grep {iohl.*1543}  %t1.s | count 2
     14 ; RUN: grep {iohl.*771}  %t1.s | count 2
     15 ; RUN: grep {iohl.*515}  %t1.s | count 1
     16 ; RUN: grep {iohl.*1799}  %t1.s | count 1
     17 ; RUN: grep lqa  %t1.s | count 1
     18 ; RUN: grep cbd  %t1.s | count 4
     19 ; RUN: grep chd  %t1.s | count 3
     20 ; RUN: grep cwd  %t1.s | count 1
     21 ; RUN: grep cdd  %t1.s | count 1
     22 
     23 ; ModuleID = 'trunc.bc'
     24 target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
     25 target triple = "spu"
     26 
     27 define <16 x i8> @trunc_i128_i8(i128 %u, <16 x i8> %v) {
     28 entry:
     29 	%0 = trunc i128 %u to i8
     30     %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 15 
     31     ret <16 x i8> %tmp1
     32 }
     33 
     34 define <8 x i16> @trunc_i128_i16(i128 %u, <8 x i16> %v) {
     35 entry:
     36     %0 = trunc i128 %u to i16
     37     %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 8 
     38     ret <8 x i16> %tmp1
     39 }
     40 
     41 define <4 x i32> @trunc_i128_i32(i128 %u, <4 x i32> %v) {
     42 entry:
     43     %0 = trunc i128 %u to i32
     44     %tmp1 = insertelement <4 x i32> %v, i32 %0, i32 2
     45     ret <4 x i32> %tmp1
     46 }
     47 
     48 define <2 x i64> @trunc_i128_i64(i128 %u, <2 x i64> %v) {
     49 entry:
     50     %0 = trunc i128 %u to i64
     51     %tmp1 = insertelement <2 x i64> %v, i64 %0, i32 1
     52     ret <2 x i64> %tmp1
     53 }
     54 
     55 define <16 x i8> @trunc_i64_i8(i64 %u, <16 x i8> %v) {
     56 entry:
     57     %0 = trunc i64 %u to i8
     58     %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 10
     59     ret <16 x i8> %tmp1
     60 }
     61 
     62 define <8 x i16> @trunc_i64_i16(i64 %u, <8 x i16> %v) {
     63 entry:
     64     %0 = trunc i64 %u to i16
     65     %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 6
     66     ret <8 x i16> %tmp1
     67 }
     68 
     69 define i32 @trunc_i64_i32(i64 %u) {
     70 entry:
     71     %0 = trunc i64 %u to i32
     72     ret i32 %0
     73 }
     74 
     75 define <16 x i8> @trunc_i32_i8(i32 %u, <16 x i8> %v) {
     76 entry:
     77     %0 = trunc i32 %u to i8
     78     %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 7
     79     ret <16 x i8> %tmp1
     80 }
     81 
     82 define <8 x i16> @trunc_i32_i16(i32 %u, <8 x i16> %v) {
     83 entry:
     84     %0 = trunc i32 %u to i16
     85     %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 3
     86     ret <8 x i16> %tmp1
     87 }
     88 
     89 define <16 x i8> @trunc_i16_i8(i16 %u, <16 x i8> %v) {
     90 entry:
     91     %0 = trunc i16 %u to i8
     92     %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 5
     93     ret <16 x i8> %tmp1
     94 }
     95