1 ; RUN: opt < %s -disable-output -loop-unroll 2 ; PR1770 3 ; PR1947 4 5 %struct.cl_engine = type { i32, i16, i32, i8**, i8**, i8*, i8*, i8*, i8*, i8*, i8*, i8* } 6 %struct.cl_limits = type { i32, i32, i32, i32, i16, i64 } 7 %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* } 8 %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* } 9 %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt* } 10 %struct.cli_bm_patt = type { i8*, i32, i8*, i8*, i8, %struct.cli_bm_patt* } 11 %struct.cli_ctx = type { i8**, i64*, %struct.cli_matcher*, %struct.cl_engine*, %struct.cl_limits*, i32, i32, i32, i32, %struct.cli_dconf* } 12 %struct.cli_dconf = type { i32, i32, i32, i32, i32, i32, i32 } 13 %struct.cli_matcher = type { i16, i8, i32*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 } 14 15 declare i8* @calloc(i64, i64) 16 17 define fastcc i32 @cli_scanpe(i32 %desc, %struct.cli_ctx* %ctx) { 18 entry: 19 br i1 false, label %cond_next17, label %cond_true14 20 21 cond_true14: ; preds = %entry 22 ret i32 0 23 24 cond_next17: ; preds = %entry 25 br i1 false, label %LeafBlock, label %LeafBlock1250 26 27 LeafBlock1250: ; preds = %cond_next17 28 ret i32 0 29 30 LeafBlock: ; preds = %cond_next17 31 br i1 false, label %cond_next33, label %cond_true30 32 33 cond_true30: ; preds = %LeafBlock 34 ret i32 0 35 36 cond_next33: ; preds = %LeafBlock 37 br i1 false, label %cond_next90, label %cond_true42 38 39 cond_true42: ; preds = %cond_next33 40 ret i32 0 41 42 cond_next90: ; preds = %cond_next33 43 br i1 false, label %cond_next100, label %cond_true97 44 45 cond_true97: ; preds = %cond_next90 46 ret i32 0 47 48 cond_next100: ; preds = %cond_next90 49 br i1 false, label %cond_next109, label %cond_true106 50 51 cond_true106: ; preds = %cond_next100 52 ret i32 0 53 54 cond_next109: ; preds = %cond_next100 55 br i1 false, label %cond_false, label %cond_true118 56 57 cond_true118: ; preds = %cond_next109 58 ret i32 0 59 60 cond_false: ; preds = %cond_next109 61 br i1 false, label %NodeBlock1482, label %cond_true126 62 63 cond_true126: ; preds = %cond_false 64 ret i32 0 65 66 NodeBlock1482: ; preds = %cond_false 67 br i1 false, label %cond_next285, label %NodeBlock1480 68 69 NodeBlock1480: ; preds = %NodeBlock1482 70 ret i32 0 71 72 cond_next285: ; preds = %NodeBlock1482 73 br i1 false, label %cond_next320, label %cond_true294 74 75 cond_true294: ; preds = %cond_next285 76 ret i32 0 77 78 cond_next320: ; preds = %cond_next285 79 br i1 false, label %LeafBlock1491, label %LeafBlock1493 80 81 LeafBlock1493: ; preds = %cond_next320 82 ret i32 0 83 84 LeafBlock1491: ; preds = %cond_next320 85 br i1 false, label %cond_true400, label %cond_true378 86 87 cond_true378: ; preds = %LeafBlock1491 88 ret i32 1 89 90 cond_true400: ; preds = %LeafBlock1491 91 br i1 false, label %cond_next413, label %cond_true406 92 93 cond_true406: ; preds = %cond_true400 94 ret i32 0 95 96 cond_next413: ; preds = %cond_true400 97 br i1 false, label %cond_next429, label %cond_true424 98 99 cond_true424: ; preds = %cond_next413 100 ret i32 0 101 102 cond_next429: ; preds = %cond_next413 103 br i1 false, label %NodeBlock1557, label %NodeBlock1579 104 105 NodeBlock1579: ; preds = %cond_next429 106 ret i32 0 107 108 NodeBlock1557: ; preds = %cond_next429 109 br i1 false, label %LeafBlock1543, label %NodeBlock1555 110 111 NodeBlock1555: ; preds = %NodeBlock1557 112 ret i32 0 113 114 LeafBlock1543: ; preds = %NodeBlock1557 115 br i1 false, label %cond_next870, label %cond_next663 116 117 cond_next663: ; preds = %LeafBlock1543 118 ret i32 0 119 120 cond_next870: ; preds = %LeafBlock1543 121 br i1 false, label %cond_true1012, label %cond_true916 122 123 cond_true916: ; preds = %cond_next870 124 ret i32 0 125 126 cond_true1012: ; preds = %cond_next870 127 br i1 false, label %cond_next3849, label %cond_true2105 128 129 cond_true2105: ; preds = %cond_true1012 130 ret i32 0 131 132 cond_next3849: ; preds = %cond_true1012 133 br i1 false, label %cond_next4378, label %bb6559 134 135 bb3862: ; preds = %cond_next4385 136 br i1 false, label %cond_false3904, label %cond_true3876 137 138 cond_true3876: ; preds = %bb3862 139 ret i32 0 140 141 cond_false3904: ; preds = %bb3862 142 br i1 false, label %cond_next4003, label %cond_true3935 143 144 cond_true3935: ; preds = %cond_false3904 145 ret i32 0 146 147 cond_next4003: ; preds = %cond_false3904 148 br i1 false, label %cond_next5160, label %cond_next4015 149 150 cond_next4015: ; preds = %cond_next4003 151 ret i32 0 152 153 cond_next4378: ; preds = %cond_next3849 154 br i1 false, label %cond_next4385, label %bb4393 155 156 cond_next4385: ; preds = %cond_next4378 157 br i1 false, label %bb3862, label %bb4393 158 159 bb4393: ; preds = %cond_next4385, %cond_next4378 160 ret i32 0 161 162 cond_next5160: ; preds = %cond_next4003 163 br i1 false, label %bb5188, label %bb6559 164 165 bb5188: ; preds = %cond_next5160 166 br i1 false, label %cond_next5285, label %cond_true5210 167 168 cond_true5210: ; preds = %bb5188 169 ret i32 0 170 171 cond_next5285: ; preds = %bb5188 172 br i1 false, label %cond_true5302, label %cond_true5330 173 174 cond_true5302: ; preds = %cond_next5285 175 br i1 false, label %bb7405, label %bb7367 176 177 cond_true5330: ; preds = %cond_next5285 178 ret i32 0 179 180 bb6559: ; preds = %cond_next5160, %cond_next3849 181 ret i32 0 182 183 bb7367: ; preds = %cond_true5302 184 ret i32 0 185 186 bb7405: ; preds = %cond_true5302 187 br i1 false, label %cond_next8154, label %cond_true7410 188 189 cond_true7410: ; preds = %bb7405 190 ret i32 0 191 192 cond_next8154: ; preds = %bb7405 193 br i1 false, label %cond_true8235, label %bb9065 194 195 cond_true8235: ; preds = %cond_next8154 196 br i1 false, label %bb8274, label %bb8245 197 198 bb8245: ; preds = %cond_true8235 199 ret i32 0 200 201 bb8274: ; preds = %cond_true8235 202 br i1 false, label %cond_next8358, label %cond_true8295 203 204 cond_true8295: ; preds = %bb8274 205 ret i32 0 206 207 cond_next8358: ; preds = %bb8274 208 br i1 false, label %cond_next.i509, label %cond_true8371 209 210 cond_true8371: ; preds = %cond_next8358 211 ret i32 -123 212 213 cond_next.i509: ; preds = %cond_next8358 214 br i1 false, label %bb36.i, label %bb33.i 215 216 bb33.i: ; preds = %cond_next.i509 217 ret i32 0 218 219 bb36.i: ; preds = %cond_next.i509 220 br i1 false, label %cond_next54.i, label %cond_true51.i 221 222 cond_true51.i: ; preds = %bb36.i 223 ret i32 0 224 225 cond_next54.i: ; preds = %bb36.i 226 %tmp10.i.i527 = call i8* @calloc( i64 0, i64 1 ) ; <i8*> [#uses=1] 227 br i1 false, label %cond_next11.i.i, label %bb132.i 228 229 bb132.i: ; preds = %cond_next54.i 230 ret i32 0 231 232 cond_next11.i.i: ; preds = %cond_next54.i 233 br i1 false, label %bb32.i.i545, label %cond_true1008.critedge.i 234 235 bb32.i.i545: ; preds = %cond_next11.i.i 236 br i1 false, label %cond_next349.i, label %cond_true184.i 237 238 cond_true184.i: ; preds = %bb32.i.i545 239 ret i32 0 240 241 cond_next349.i: ; preds = %bb32.i.i545 242 br i1 false, label %cond_next535.i, label %cond_true1008.critedge1171.i 243 244 cond_next535.i: ; preds = %cond_next349.i 245 br i1 false, label %cond_next569.i, label %cond_false574.i 246 247 cond_next569.i: ; preds = %cond_next535.i 248 br i1 false, label %cond_next670.i, label %cond_true1008.critedge1185.i 249 250 cond_false574.i: ; preds = %cond_next535.i 251 ret i32 0 252 253 cond_next670.i: ; preds = %cond_next569.i 254 br i1 false, label %cond_true692.i, label %cond_next862.i 255 256 cond_true692.i: ; preds = %cond_next670.i 257 br i1 false, label %cond_false742.i, label %cond_true718.i 258 259 cond_true718.i: ; preds = %cond_true692.i 260 ret i32 0 261 262 cond_false742.i: ; preds = %cond_true692.i 263 br i1 false, label %cond_true784.i, label %cond_next9079 264 265 cond_true784.i: ; preds = %cond_next811.i, %cond_false742.i 266 %indvar1411.i.reg2mem.0 = phi i8 [ %indvar.next1412.i, %cond_next811.i ], [ 0, %cond_false742.i ] ; <i8> [#uses=1] 267 br i1 false, label %cond_true1008.critedge1190.i, label %cond_next811.i 268 269 cond_next811.i: ; preds = %cond_true784.i 270 %indvar.next1412.i = add i8 %indvar1411.i.reg2mem.0, 1 ; <i8> [#uses=2] 271 %tmp781.i = icmp eq i8 %indvar.next1412.i, 3 ; <i1> [#uses=1] 272 br i1 %tmp781.i, label %cond_next9079, label %cond_true784.i 273 274 cond_next862.i: ; preds = %cond_next670.i 275 ret i32 0 276 277 cond_true1008.critedge.i: ; preds = %cond_next11.i.i 278 ret i32 0 279 280 cond_true1008.critedge1171.i: ; preds = %cond_next349.i 281 ret i32 0 282 283 cond_true1008.critedge1185.i: ; preds = %cond_next569.i 284 ret i32 0 285 286 cond_true1008.critedge1190.i: ; preds = %cond_true784.i 287 %tmp621.i532.lcssa610 = phi i8* [ %tmp10.i.i527, %cond_true784.i ] ; <i8*> [#uses=0] 288 ret i32 0 289 290 bb9065: ; preds = %cond_next8154 291 ret i32 0 292 293 cond_next9079: ; preds = %cond_next811.i, %cond_false742.i 294 ret i32 0 295 } 296
