1 This file is a partial list of people who have contributed to the LLVM 2 project. If you have contributed a patch or made some other contribution to 3 LLVM, please submit a patch to this file to add yourself, and it will be 4 done! 5 6 The list is sorted by surname and formatted to allow easy grepping and 7 beautification by scripts. The fields are: name (N), email (E), web-address 8 (W), PGP key ID and fingerprint (P), description (D), snail-mail address 9 (S), and (I) IRC handle. 10 11 N: Vikram Adve 12 E: vadve (a] cs.uiuc.edu 13 W: http://www.cs.uiuc.edu/~vadve/ 14 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM 15 16 N: Owen Anderson 17 E: resistor (a] mac.com 18 D: LCSSA pass and related LoopUnswitch work 19 D: GVNPRE pass, DataLayout refactoring, random improvements 20 21 N: Henrik Bach 22 D: MingW Win32 API portability layer 23 24 N: Aaron Ballman 25 E: aaron (a] aaronballman.com 26 D: Clang frontend, frontend attributes, Windows support, general bug fixing 27 I: AaronBallman 28 29 N: Nate Begeman 30 E: natebegeman (a] mac.com 31 D: PowerPC backend developer 32 D: Target-independent code generator and analysis improvements 33 34 N: Daniel Berlin 35 E: dberlin (a] dberlin.org 36 D: ET-Forest implementation. 37 D: Sparse bitmap 38 39 N: Geoff Berry 40 E: gberry (a] codeaurora.org 41 E: gcb (a] acm.org 42 D: AArch64 backend improvements 43 D: Added EarlyCSE MemorySSA support 44 D: CodeGen improvements 45 46 N: David Blaikie 47 E: dblaikie (a] gmail.com 48 D: General bug fixing/fit & finish, mostly in Clang 49 50 N: Neil Booth 51 E: neil (a] daikokuya.co.uk 52 D: APFloat implementation. 53 54 N: Alex Bradbury 55 E: asb (a] lowrisc.org 56 D: RISC-V backend 57 58 N: Misha Brukman 59 E: brukman+llvm (a] uiuc.edu 60 W: http://misha.brukman.net 61 D: Portions of X86 and Sparc JIT compilers, PowerPC backend 62 D: Incremental bitcode loader 63 64 N: Cameron Buschardt 65 E: buschard (a] uiuc.edu 66 D: The `mem2reg' pass - promotes values stored in memory to registers 67 68 N: Brendon Cahoon 69 E: bcahoon (a] codeaurora.org 70 D: Loop unrolling with run-time trip counts. 71 72 N: Chandler Carruth 73 E: chandlerc (a] gmail.com 74 E: chandlerc (a] google.com 75 D: Hashing algorithms and interfaces 76 D: Inline cost analysis 77 D: Machine block placement pass 78 D: SROA 79 80 N: Casey Carter 81 E: ccarter (a] uiuc.edu 82 D: Fixes to the Reassociation pass, various improvement patches 83 84 N: Evan Cheng 85 E: evan.cheng (a] apple.com 86 D: ARM and X86 backends 87 D: Instruction scheduler improvements 88 D: Register allocator improvements 89 D: Loop optimizer improvements 90 D: Target-independent code generator improvements 91 92 N: Dan Villiom Podlaski Christiansen 93 E: danchr (a] gmail.com 94 E: danchr (a] cs.au.dk 95 W: http://villiom.dk 96 D: LLVM Makefile improvements 97 D: Clang diagnostic & driver tweaks 98 S: Aarhus, Denmark 99 100 N: Jeff Cohen 101 E: jeffc (a] jolt-lang.org 102 W: http://jolt-lang.org 103 D: Native Win32 API portability layer 104 105 N: John T. Criswell 106 E: criswell (a] uiuc.edu 107 D: Original Autoconf support, documentation improvements, bug fixes 108 109 N: Anshuman Dasgupta 110 E: adasgupt (a] codeaurora.org 111 D: Deterministic finite automaton based infrastructure for VLIW packetization 112 113 N: Stefanus Du Toit 114 E: stefanus.du.toit (a] intel.com 115 D: Bug fixes and minor improvements 116 117 N: Rafael Avila de Espindola 118 E: rafael (a] espindo.la 119 D: MC and LLD work 120 121 N: Dave Estes 122 E: cestes (a] codeaurora.org 123 D: AArch64 machine description for Cortex-A53 124 125 N: Alkis Evlogimenos 126 E: alkis (a] evlogimenos.com 127 D: Linear scan register allocator, many codegen improvements, Java frontend 128 129 N: Hal Finkel 130 E: hfinkel (a] anl.gov 131 D: Basic-block autovectorization, PowerPC backend improvements 132 133 N: Eric Fiselier 134 E: eric (a] efcs.ca 135 D: LIT patches and documentation. 136 137 N: Ryan Flynn 138 E: pizza (a] parseerror.com 139 D: Miscellaneous bug fixes 140 141 N: Brian Gaeke 142 E: gaeke (a] uiuc.edu 143 W: http://www.students.uiuc.edu/~gaeke/ 144 D: Portions of X86 static and JIT compilers; initial SparcV8 backend 145 D: Dynamic trace optimizer 146 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool 147 148 N: Nicolas Geoffray 149 E: nicolas.geoffray (a] lip6.fr 150 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ 151 D: PPC backend fixes for Linux 152 153 N: Louis Gerbarg 154 E: lgg (a] apple.com 155 D: Portions of the PowerPC backend 156 157 N: Saem Ghani 158 E: saemghani (a] gmail.com 159 D: Callgraph class cleanups 160 161 N: Mikhail Glushenkov 162 E: foldr (a] codedgers.com 163 D: Author of llvmc2 164 165 N: Dan Gohman 166 E: sunfish (a] mozilla.com 167 D: Miscellaneous bug fixes 168 D: WebAssembly Backend 169 170 N: David Goodwin 171 E: david (a] goodwinz.net 172 D: Thumb-2 code generator 173 174 N: David Greene 175 E: greened (a] obbligato.org 176 D: Miscellaneous bug fixes 177 D: Register allocation refactoring 178 179 N: Gabor Greif 180 E: ggreif (a] gmail.com 181 D: Improvements for space efficiency 182 183 N: James Grosbach 184 E: grosbach (a] apple.com 185 I: grosbach 186 D: SjLj exception handling support 187 D: General fixes and improvements for the ARM back-end 188 D: MCJIT 189 D: ARM integrated assembler and assembly parser 190 D: Led effort for the backend formerly known as ARM64 191 192 N: Lang Hames 193 E: lhames (a] gmail.com 194 D: PBQP-based register allocator 195 196 N: Gordon Henriksen 197 E: gordonhenriksen (a] mac.com 198 D: Pluggable GC support 199 D: C interface 200 D: Ocaml bindings 201 202 N: Raul Fernandes Herbster 203 E: raul (a] dsc.ufcg.edu.br 204 D: JIT support for ARM 205 206 N: Paolo Invernizzi 207 E: arathorn (a] fastwebnet.it 208 D: Visual C++ compatibility fixes 209 210 N: Patrick Jenkins 211 E: patjenk (a] wam.umd.edu 212 D: Nightly Tester 213 214 N: Tony(Yanjun) Jiang 215 E: jtony (a] ca.ibm.com 216 D: PowerPC Backend Developer 217 D: Improvements to the PPC backend and miscellaneous bug fixes 218 219 N: Dale Johannesen 220 E: dalej (a] apple.com 221 D: ARM constant islands improvements 222 D: Tail merging improvements 223 D: Rewrite X87 back end 224 D: Use APFloat for floating point constants widely throughout compiler 225 D: Implement X87 long double 226 227 N: Brad Jones 228 E: kungfoomaster (a] nondot.org 229 D: Support for packed types 230 231 N: Rod Kay 232 E: rkay (a] auroraux.org 233 D: Author of LLVM Ada bindings 234 235 N: Erich Keane 236 E: erich.keane (a] intel.com 237 D: A variety of Clang contributions including function multiversioning, regcall/vectorcall. 238 I: ErichKeane 239 240 N: Eric Kidd 241 W: http://randomhacks.net/ 242 D: llvm-config script 243 244 N: Anton Korobeynikov 245 E: anton at korobeynikov dot info 246 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. 247 D: x86/linux PIC codegen, aliases, regparm/visibility attributes 248 D: Switch lowering refactoring 249 250 N: Sumant Kowshik 251 E: kowshik (a] uiuc.edu 252 D: Author of the original C backend 253 254 N: Benjamin Kramer 255 E: benny.kra (a] gmail.com 256 D: Miscellaneous bug fixes 257 258 N: Sundeep Kushwaha 259 E: sundeepk (a] codeaurora.org 260 D: Implemented DFA-based target independent VLIW packetizer 261 262 N: Christopher Lamb 263 E: christopher.lamb (a] gmail.com 264 D: aligned load/store support, parts of noalias and restrict support 265 D: vreg subreg infrastructure, X86 codegen improvements based on subregs 266 D: address spaces 267 268 N: Jim Laskey 269 E: jlaskey (a] apple.com 270 D: Improvements to the PPC backend, instruction scheduling 271 D: Debug and Dwarf implementation 272 D: Auto upgrade mangler 273 D: llvm-gcc4 svn wrangler 274 275 N: Chris Lattner 276 E: sabre (a] nondot.org 277 W: http://nondot.org/~sabre/ 278 D: Primary architect of LLVM 279 280 N: Tanya Lattner (Tanya Brethour) 281 E: tonic (a] nondot.org 282 W: http://nondot.org/~tonic/ 283 D: The initial llvm-ar tool, converted regression testsuite to dejagnu 284 D: Modulo scheduling in the SparcV9 backend 285 D: Release manager (1.7+) 286 287 N: Sylvestre Ledru 288 E: sylvestre (a] debian.org 289 W: http://sylvestre.ledru.info/ 290 W: https://apt.llvm.org/ 291 D: Debian and Ubuntu packaging 292 D: Continuous integration with jenkins 293 294 N: Andrew Lenharth 295 E: alenhar2 (a] cs.uiuc.edu 296 W: http://www.lenharth.org/~andrewl/ 297 D: Alpha backend 298 D: Sampling based profiling 299 300 N: Nick Lewycky 301 E: nicholas (a] mxc.ca 302 D: PredicateSimplifier pass 303 304 N: Tony Linthicum, et. al. 305 E: tlinth (a] codeaurora.org 306 D: Backend for Qualcomm's Hexagon VLIW processor. 307 308 N: Bruno Cardoso Lopes 309 E: bruno.cardoso (a] gmail.com 310 I: bruno 311 W: http://brunocardoso.cc 312 D: Mips backend 313 D: Random ARM integrated assembler and assembly parser improvements 314 D: General X86 AVX1 support 315 316 N: Duraid Madina 317 E: duraid (a] octopus.com.au 318 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ 319 D: IA64 backend, BigBlock register allocator 320 321 N: John McCall 322 E: rjmccall (a] apple.com 323 D: Clang semantic analysis and IR generation 324 325 N: Michael McCracken 326 E: michael.mccracken (a] gmail.com 327 D: Line number support for llvmgcc 328 329 N: Vladimir Merzliakov 330 E: wanderer (a] rsu.ru 331 D: Test suite fixes for FreeBSD 332 333 N: Scott Michel 334 E: scottm (a] aero.org 335 D: Added STI Cell SPU backend. 336 337 N: Kai Nacke 338 E: kai (a] redstar.de 339 D: Support for implicit TLS model used with MS VC runtime 340 D: Dumping of Win64 EH structures 341 342 N: Takumi Nakamura 343 I: chapuni 344 E: geek4civic (a] gmail.com 345 E: chapuni (a] hf.rim.or.jp 346 D: Maintaining the Git monorepo 347 W: https://github.com/llvm-project/ 348 S: Ebina, Japan 349 350 N: Edward O'Callaghan 351 E: eocallaghan (a] auroraux.org 352 W: http://www.auroraux.org 353 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl 354 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings 355 D: and error clean ups. 356 357 N: Morten Ofstad 358 E: morten (a] hue.no 359 D: Visual C++ compatibility fixes 360 361 N: Jakob Stoklund Olesen 362 E: stoklund (a] 2pi.dk 363 D: Machine code verifier 364 D: Blackfin backend 365 D: Fast register allocator 366 D: Greedy register allocator 367 368 N: Richard Osborne 369 E: richard (a] xmos.com 370 D: XCore backend 371 372 N: Piotr Padlewski 373 E: piotr.padlewski (a] gmail.com 374 D: !invariant.group metadata and other intrinsics for devirtualization in clang 375 376 N: Devang Patel 377 E: dpatel (a] apple.com 378 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate 379 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements 380 D: Optimizer improvements, Loop Index Split 381 382 N: Ana Pazos 383 E: apazos (a] codeaurora.org 384 D: Fixes and improvements to the AArch64 backend 385 386 N: Wesley Peck 387 E: peckw (a] wesleypeck.com 388 W: http://wesleypeck.com/ 389 D: MicroBlaze backend 390 391 N: Francois Pichet 392 E: pichet2000 (a] gmail.com 393 D: MSVC support 394 395 N: Adrian Prantl 396 E: aprantl (a] apple.com 397 D: Debug Information 398 399 N: Vladimir Prus 400 W: http://vladimir_prus.blogspot.com 401 E: ghost (a] cs.msu.su 402 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass 403 404 N: Kalle Raiskila 405 E: kalle.rasikila (a] nokia.com 406 D: Some bugfixes to CellSPU 407 408 N: Xerxes Ranby 409 E: xerxes (a] zafena.se 410 D: Cmake dependency chain and various bug fixes 411 412 N: Alex Rosenberg 413 E: alexr (a] leftfield.org 414 I: arosenberg 415 D: ARM calling conventions rewrite, hard float support 416 417 N: Chad Rosier 418 E: mcrosier (a] codeaurora.org 419 I: mcrosier 420 D: AArch64 fast instruction selection pass 421 D: Fixes and improvements to the ARM fast-isel pass 422 D: Fixes and improvements to the AArch64 backend 423 424 N: Nadav Rotem 425 E: nadav.rotem (a] me.com 426 D: X86 code generation improvements, Loop Vectorizer, SLP Vectorizer 427 428 N: Roman Samoilov 429 E: roman (a] codedgers.com 430 D: MSIL backend 431 432 N: Duncan Sands 433 E: baldrick (a] free.fr 434 I: baldrick 435 D: Ada support in llvm-gcc 436 D: Dragonegg plugin 437 D: Exception handling improvements 438 D: Type legalizer rewrite 439 440 N: Ruchira Sasanka 441 E: sasanka (a] uiuc.edu 442 D: Graph coloring register allocator for the Sparc64 backend 443 444 N: Arnold Schwaighofer 445 E: arnold.schwaighofer (a] gmail.com 446 D: Tail call optimization for the x86 backend 447 448 N: Shantonu Sen 449 E: ssen (a] apple.com 450 D: Miscellaneous bug fixes 451 452 N: Anand Shukla 453 E: ashukla (a] cs.uiuc.edu 454 D: The `paths' pass 455 456 N: Michael J. Spencer 457 E: bigcheesegs (a] gmail.com 458 D: Shepherding Windows COFF support into MC. 459 D: Lots of Windows stuff. 460 461 N: Reid Spencer 462 E: rspencer (a] reidspencer.com 463 W: http://reidspencer.com/ 464 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid 465 466 N: Alp Toker 467 E: alp (a] nuanti.com 468 W: http://atoker.com/ 469 D: C++ frontend next generation standards implementation 470 471 N: Craig Topper 472 E: craig.topper (a] gmail.com 473 D: X86 codegen and disassembler improvements. AVX2 support. 474 475 N: Edwin Torok 476 E: edwintorok (a] gmail.com 477 D: Miscellaneous bug fixes 478 479 N: Adam Treat 480 E: manyoso (a] yahoo.com 481 D: C++ bugs filed, and C++ front-end bug fixes. 482 483 N: Andrew Trick 484 E: atrick (a] apple.com 485 D: Instruction Scheduling, ... 486 487 N: Lauro Ramos Venancio 488 E: lauro.venancio (a] indt.org.br 489 D: ARM backend improvements 490 D: Thread Local Storage implementation 491 492 N: Bill Wendling 493 I: wendling 494 E: isanbard (a] gmail.com 495 D: Release manager, IR Linker, LTO 496 D: Bunches of stuff 497 498 N: Bob Wilson 499 E: bob.wilson (a] acm.org 500 D: Advanced SIMD (NEON) support in the ARM backend. 501 502 N: QingShan Zhang 503 E: qshanz (a] cn.ibm.com 504 D: PowerPC Backend Developer 505
