Home | History | Annotate | Download | only in ARC
      1 //===- ARCCallingConv.td - Calling Conventions for ARC -----*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 // This describes the calling conventions for ARC architecture.
     10 //===----------------------------------------------------------------------===//
     11 
     12 //===----------------------------------------------------------------------===//
     13 // ARC Return Value Calling Convention
     14 //===----------------------------------------------------------------------===//
     15 def RetCC_ARC : CallingConv<[
     16   // i32 are returned in registers R0, R1, R2, R3
     17   CCIfType<[i32, i64], CCAssignToReg<[R0, R1, R2, R3]>>,
     18 
     19   // Integer values get stored in stack slots that are 4 bytes in
     20   // size and 4-byte aligned.
     21   CCIfType<[i64], CCAssignToStack<8, 4>>,
     22   CCIfType<[i32], CCAssignToStack<4, 4>>
     23 ]>;
     24 
     25 //===----------------------------------------------------------------------===//
     26 // ARC Argument Calling Conventions
     27 //===----------------------------------------------------------------------===//
     28 def CC_ARC : CallingConv<[
     29   // Promote i8/i16 arguments to i32.
     30   CCIfType<[i8, i16], CCPromoteToType<i32>>,
     31 
     32   // The first 8 integer arguments are passed in integer registers.
     33   CCIfType<[i32, i64], CCAssignToReg<[R0, R1, R2, R3, R4, R5, R6, R7]>>,
     34 
     35   // Integer values get stored in stack slots that are 4 bytes in
     36   // size and 4-byte aligned.
     37   CCIfType<[i64], CCAssignToStack<8, 4>>,
     38   CCIfType<[i32], CCAssignToStack<4, 4>>
     39 ]>;
     40 
     41 def CSR_ARC : CalleeSavedRegs<(add (sequence "R%u", 13, 25), GP, FP)>;
     42