1 //=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file describes Mips32r6 instruction formats. 11 // 12 //===----------------------------------------------------------------------===// 13 14 class R6MMR6Rel; 15 16 def MipsR62MicroMipsR6 : InstrMapping { 17 let FilterClass = "R6MMR6Rel"; 18 // Instructions with the same BaseOpcode and isNVStore values form a row. 19 let RowFields = ["BaseOpcode"]; 20 // Instructions with the same predicate sense form a column. 21 let ColFields = ["Arch"]; 22 // The key column is the unpredicated instructions. 23 let KeyCol = ["mipsr6"]; 24 // Value columns are PredSense=true and PredSense=false 25 let ValueCols = [["mipsr6"], ["micromipsr6"]]; 26 } 27 28 class MipsR6Arch<string opstr> { 29 string Arch = "mipsr6"; 30 string BaseOpcode = opstr; 31 } 32 33 class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> { 34 let DecoderNamespace = "Mips32r6_64r6"; 35 let EncodingPredicates = [HasStdEnc]; 36 } 37 38 //===----------------------------------------------------------------------===// 39 // 40 // Field Values 41 // 42 //===----------------------------------------------------------------------===// 43 44 class OPGROUP<bits<6> Val> { 45 bits<6> Value = Val; 46 } 47 def OPGROUP_COP0 : OPGROUP<0b010000>; 48 def OPGROUP_COP1 : OPGROUP<0b010001>; 49 def OPGROUP_COP2 : OPGROUP<0b010010>; 50 def OPGROUP_ADDI : OPGROUP<0b001000>; 51 def OPGROUP_AUI : OPGROUP<0b001111>; 52 def OPGROUP_BLEZ : OPGROUP<0b000110>; 53 def OPGROUP_BGTZ : OPGROUP<0b000111>; 54 def OPGROUP_BLEZL : OPGROUP<0b010110>; 55 def OPGROUP_BGTZL : OPGROUP<0b010111>; 56 def OPGROUP_DADDI : OPGROUP<0b011000>; 57 def OPGROUP_DAUI : OPGROUP<0b011101>; 58 def OPGROUP_PCREL : OPGROUP<0b111011>; 59 def OPGROUP_REGIMM : OPGROUP<0b000001>; 60 def OPGROUP_SPECIAL : OPGROUP<0b000000>; 61 // The spec occasionally names this value LL, LLD, SC, or SCD. 62 def OPGROUP_SPECIAL3 : OPGROUP<0b011111>; 63 // The spec names this constant LWC2, LDC2, SWC2, and SDC2 in different places. 64 def OPGROUP_COP2LDST : OPGROUP<0b010010>; 65 66 class OPCODE2<bits<2> Val> { 67 bits<2> Value = Val; 68 } 69 def OPCODE2_ADDIUPC : OPCODE2<0b00>; 70 def OPCODE2_LWPC : OPCODE2<0b01>; 71 def OPCODE2_LWUPC : OPCODE2<0b10>; 72 73 class OPCODE3<bits<3> Val> { 74 bits<3> Value = Val; 75 } 76 def OPCODE3_LDPC : OPCODE3<0b110>; 77 78 class OPCODE5<bits<5> Val> { 79 bits<5> Value = Val; 80 } 81 def OPCODE5_ALUIPC : OPCODE5<0b11111>; 82 def OPCODE5_AUIPC : OPCODE5<0b11110>; 83 def OPCODE5_DAHI : OPCODE5<0b00110>; 84 def OPCODE5_DATI : OPCODE5<0b11110>; 85 def OPCODE5_BC1EQZ : OPCODE5<0b01001>; 86 def OPCODE5_BC1NEZ : OPCODE5<0b01101>; 87 def OPCODE5_BC2EQZ : OPCODE5<0b01001>; 88 def OPCODE5_BC2NEZ : OPCODE5<0b01101>; 89 def OPCODE5_BGEZAL : OPCODE5<0b10001>; 90 // The next four constants are unnamed in the spec. These names are taken from 91 // the OPGROUP names they are used with. 92 def OPCODE5_LDC2 : OPCODE5<0b01110>; 93 def OPCODE5_LWC2 : OPCODE5<0b01010>; 94 def OPCODE5_SDC2 : OPCODE5<0b01111>; 95 def OPCODE5_SWC2 : OPCODE5<0b01011>; 96 97 class OPCODE6<bits<6> Val> { 98 bits<6> Value = Val; 99 } 100 def OPCODE6_ALIGN : OPCODE6<0b100000>; 101 def OPCODE6_DALIGN : OPCODE6<0b100100>; 102 def OPCODE6_BITSWAP : OPCODE6<0b100000>; 103 def OPCODE6_DBITSWAP : OPCODE6<0b100100>; 104 def OPCODE6_JALR : OPCODE6<0b001001>; 105 def OPCODE6_CACHE : OPCODE6<0b100101>; 106 def OPCODE6_PREF : OPCODE6<0b110101>; 107 // The next four constants are unnamed in the spec. These names are taken from 108 // the OPGROUP names they are used with. 109 def OPCODE6_LL : OPCODE6<0b110110>; 110 def OPCODE6_LLD : OPCODE6<0b110111>; 111 def OPCODE6_SC : OPCODE6<0b100110>; 112 def OPCODE6_SCD : OPCODE6<0b100111>; 113 def OPCODE6_CLO : OPCODE6<0b010001>; 114 def OPCODE6_CLZ : OPCODE6<0b010000>; 115 def OPCODE6_DCLO : OPCODE6<0b010011>; 116 def OPCODE6_DCLZ : OPCODE6<0b010010>; 117 def OPCODE6_LSA : OPCODE6<0b000101>; 118 def OPCODE6_DLSA : OPCODE6<0b010101>; 119 def OPCODE6_SDBBP : OPCODE6<0b001110>; 120 121 class FIELD_FMT<bits<5> Val> { 122 bits<5> Value = Val; 123 } 124 def FIELD_FMT_S : FIELD_FMT<0b10000>; 125 def FIELD_FMT_D : FIELD_FMT<0b10001>; 126 127 class FIELD_CMP_COND<bits<5> Val> { 128 bits<5> Value = Val; 129 } 130 // Note: The CMP_COND_FMT names differ from the C_COND_FMT names. 131 def FIELD_CMP_COND_AF : FIELD_CMP_COND<0b00000>; 132 def FIELD_CMP_COND_UN : FIELD_CMP_COND<0b00001>; 133 def FIELD_CMP_COND_EQ : FIELD_CMP_COND<0b00010>; 134 def FIELD_CMP_COND_UEQ : FIELD_CMP_COND<0b00011>; 135 def FIELD_CMP_COND_LT : FIELD_CMP_COND<0b00100>; 136 def FIELD_CMP_COND_ULT : FIELD_CMP_COND<0b00101>; 137 def FIELD_CMP_COND_LE : FIELD_CMP_COND<0b00110>; 138 def FIELD_CMP_COND_ULE : FIELD_CMP_COND<0b00111>; 139 def FIELD_CMP_COND_SAF : FIELD_CMP_COND<0b01000>; 140 def FIELD_CMP_COND_SUN : FIELD_CMP_COND<0b01001>; 141 def FIELD_CMP_COND_SEQ : FIELD_CMP_COND<0b01010>; 142 def FIELD_CMP_COND_SUEQ : FIELD_CMP_COND<0b01011>; 143 def FIELD_CMP_COND_SLT : FIELD_CMP_COND<0b01100>; 144 def FIELD_CMP_COND_SULT : FIELD_CMP_COND<0b01101>; 145 def FIELD_CMP_COND_SLE : FIELD_CMP_COND<0b01110>; 146 def FIELD_CMP_COND_SULE : FIELD_CMP_COND<0b01111>; 147 148 class FIELD_CMP_FORMAT<bits<5> Val> { 149 bits<5> Value = Val; 150 } 151 def FIELD_CMP_FORMAT_S : FIELD_CMP_FORMAT<0b10100>; 152 def FIELD_CMP_FORMAT_D : FIELD_CMP_FORMAT<0b10101>; 153 154 //===----------------------------------------------------------------------===// 155 // 156 // Disambiguators 157 // 158 //===----------------------------------------------------------------------===// 159 // 160 // Some encodings are ambiguous except by comparing field values. 161 162 class DecodeDisambiguates<string Name> { 163 string DecoderMethod = !strconcat("Decode", Name); 164 } 165 166 class DecodeDisambiguatedBy<string Name> : DecodeDisambiguates<Name> { 167 string DecoderNamespace = "Mips32r6_64r6_Ambiguous"; 168 } 169 170 //===----------------------------------------------------------------------===// 171 // 172 // Encoding Formats 173 // 174 //===----------------------------------------------------------------------===// 175 176 class AUI_FM : MipsR6Inst { 177 bits<5> rs; 178 bits<5> rt; 179 bits<16> imm; 180 181 bits<32> Inst; 182 183 let Inst{31-26} = OPGROUP_AUI.Value; 184 let Inst{25-21} = rs; 185 let Inst{20-16} = rt; 186 let Inst{15-0} = imm; 187 } 188 189 class DAUI_FM : AUI_FM { 190 let Inst{31-26} = OPGROUP_DAUI.Value; 191 } 192 193 class BAL_FM : MipsR6Inst { 194 bits<16> offset; 195 196 bits<32> Inst; 197 198 let Inst{31-26} = OPGROUP_REGIMM.Value; 199 let Inst{25-21} = 0b00000; 200 let Inst{20-16} = OPCODE5_BGEZAL.Value; 201 let Inst{15-0} = offset; 202 } 203 204 class COP0_EVP_DVP_FM<bits<1> sc> : MipsR6Inst { 205 bits<5> rt; 206 207 bits<32> Inst; 208 209 let Inst{31-26} = OPGROUP_COP0.Value; 210 let Inst{25-21} = 0b01011; 211 let Inst{20-16} = rt; 212 let Inst{15-11} = 0b00000; 213 let Inst{10-6} = 0b00000; 214 let Inst{5} = sc; 215 let Inst{4-3} = 0b00; 216 let Inst{2-0} = 0b100; 217 } 218 219 class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst { 220 bits<5> fs; 221 bits<5> fd; 222 223 bits<32> Inst; 224 225 let Inst{31-26} = OPGROUP_COP1.Value; 226 let Inst{25-21} = Format.Value; 227 let Inst{20-16} = 0b00000; 228 let Inst{15-11} = fs; 229 let Inst{10-6} = fd; 230 let Inst{5-0} = funct; 231 } 232 233 class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst { 234 bits<5> ft; 235 bits<5> fs; 236 bits<5> fd; 237 238 bits<32> Inst; 239 240 let Inst{31-26} = OPGROUP_COP1.Value; 241 let Inst{25-21} = Format.Value; 242 let Inst{20-16} = ft; 243 let Inst{15-11} = fs; 244 let Inst{10-6} = fd; 245 let Inst{5-0} = funct; 246 } 247 248 class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst { 249 bits<5> ft; 250 bits<16> offset; 251 252 bits<32> Inst; 253 254 let Inst{31-26} = OPGROUP_COP1.Value; 255 let Inst{25-21} = Operation.Value; 256 let Inst{20-16} = ft; 257 let Inst{15-0} = offset; 258 } 259 260 class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst { 261 bits<5> ct; 262 bits<16> offset; 263 264 bits<32> Inst; 265 266 let Inst{31-26} = OPGROUP_COP2.Value; 267 let Inst{25-21} = Operation.Value; 268 let Inst{20-16} = ct; 269 let Inst{15-0} = offset; 270 } 271 272 class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst { 273 bits<5> rs; 274 bits<16> imm; 275 276 bits<32> Inst; 277 278 let Inst{31-26} = OPGROUP_PCREL.Value; 279 let Inst{25-21} = rs; 280 let Inst{20-16} = Operation.Value; 281 let Inst{15-0} = imm; 282 } 283 284 class PCREL19_FM<OPCODE2 Operation> : MipsR6Inst { 285 bits<5> rs; 286 bits<19> imm; 287 288 bits<32> Inst; 289 290 let Inst{31-26} = OPGROUP_PCREL.Value; 291 let Inst{25-21} = rs; 292 let Inst{20-19} = Operation.Value; 293 let Inst{18-0} = imm; 294 } 295 296 class PCREL18_FM<OPCODE3 Operation> : MipsR6Inst { 297 bits<5> rs; 298 bits<18> imm; 299 300 bits<32> Inst; 301 302 let Inst{31-26} = OPGROUP_PCREL.Value; 303 let Inst{25-21} = rs; 304 let Inst{20-18} = Operation.Value; 305 let Inst{17-0} = imm; 306 } 307 308 class SPECIAL3_2R_FM<OPCODE6 Operation> : MipsR6Inst { 309 bits<5> rd; 310 bits<5> rt; 311 312 bits<32> Inst; 313 314 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 315 let Inst{25-21} = 0b00000; 316 let Inst{20-16} = rt; 317 let Inst{15-11} = rd; 318 let Inst{10-6} = 0b00000; 319 let Inst{5-0} = Operation.Value; 320 } 321 322 class SPECIAL3_MEM_FM<OPCODE6 Operation> : MipsR6Inst { 323 bits<21> addr; 324 bits<5> hint; 325 bits<5> base = addr{20-16}; 326 bits<9> offset = addr{8-0}; 327 328 bits<32> Inst; 329 330 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 331 let Inst{25-21} = base; 332 let Inst{20-16} = hint; 333 let Inst{15-7} = offset; 334 let Inst{6} = 0; 335 let Inst{5-0} = Operation.Value; 336 } 337 338 class SPECIAL_2R_FM<OPCODE6 Operation> : MipsR6Inst { 339 bits<5> rd; 340 bits<5> rs; 341 342 bits<32> Inst; 343 344 let Inst{31-26} = OPGROUP_SPECIAL.Value; 345 let Inst{25-21} = rs; 346 let Inst{20-16} = 0b00000; 347 let Inst{15-11} = rd; 348 let Inst{10-6} = 0b00001; 349 let Inst{5-0} = Operation.Value; 350 } 351 352 class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst { 353 bits<5> rd; 354 bits<5> rs; 355 bits<5> rt; 356 357 bits<32> Inst; 358 359 let Inst{31-26} = OPGROUP_SPECIAL.Value; 360 let Inst{25-21} = rs; 361 let Inst{20-16} = rt; 362 let Inst{15-11} = rd; 363 let Inst{10-6} = mulop; 364 let Inst{5-0} = funct; 365 } 366 367 class SPECIAL_SDBBP_FM : MipsR6Inst { 368 bits<20> code_; 369 370 bits<32> Inst; 371 372 let Inst{31-26} = OPGROUP_SPECIAL.Value; 373 let Inst{25-6} = code_; 374 let Inst{5-0} = OPCODE6_SDBBP.Value; 375 } 376 377 // This class is ambiguous with other branches: 378 // BEQC/BNEC require that rs < rt && rs != 0 379 class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst { 380 bits<5> rs; 381 bits<5> rt; 382 bits<16> offset; 383 384 bits<32> Inst; 385 386 let Inst{31-26} = funct.Value; 387 let Inst{25-21} = rs; 388 let Inst{20-16} = rt; 389 let Inst{15-0} = offset; 390 } 391 392 // This class is ambiguous with other branches: 393 // BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0 394 // The '1R_RT' in the name means 1 register in the rt field. 395 class CMP_BRANCH_1R_RT_OFF16_FM<OPGROUP funct> : MipsR6Inst { 396 bits<5> rt; 397 bits<16> offset; 398 399 bits<32> Inst; 400 401 let Inst{31-26} = funct.Value; 402 let Inst{25-21} = 0b00000; 403 let Inst{20-16} = rt; 404 let Inst{15-0} = offset; 405 } 406 407 // This class is ambiguous with other branches: 408 // BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0 409 // The '1R_BOTH' in the name means 1 register in both the rs and rt fields. 410 class CMP_BRANCH_1R_BOTH_OFF16_FM<OPGROUP funct> : MipsR6Inst { 411 bits<5> rt; 412 bits<16> offset; 413 414 bits<32> Inst; 415 416 let Inst{31-26} = funct.Value; 417 let Inst{25-21} = rt; 418 let Inst{20-16} = rt; 419 let Inst{15-0} = offset; 420 } 421 422 class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst { 423 bits<5> rs; // rs != 0 424 bits<21> offset; 425 426 bits<32> Inst; 427 428 let Inst{31-26} = funct; 429 let Inst{25-21} = rs; 430 let Inst{20-0} = offset; 431 } 432 433 class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst { 434 bits<5> rt; 435 bits<16> offset; 436 437 bits<32> Inst; 438 439 let Inst{31-26} = funct; 440 let Inst{25-21} = 0b00000; 441 let Inst{20-16} = rt; 442 let Inst{15-0} = offset; 443 } 444 445 class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst { 446 bits<32> Inst; 447 bits<26> offset; 448 449 let Inst{31-26} = funct; 450 let Inst{25-0} = offset; 451 } 452 453 class SPECIAL3_ALIGN_FM<OPCODE6 Operation> : MipsR6Inst { 454 bits<5> rd; 455 bits<5> rs; 456 bits<5> rt; 457 bits<2> bp; 458 459 bits<32> Inst; 460 461 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 462 let Inst{25-21} = rs; 463 let Inst{20-16} = rt; 464 let Inst{15-11} = rd; 465 let Inst{10-8} = 0b010; 466 let Inst{7-6} = bp; 467 let Inst{5-0} = Operation.Value; 468 } 469 470 class SPECIAL3_DALIGN_FM<OPCODE6 Operation> : MipsR6Inst { 471 bits<5> rd; 472 bits<5> rs; 473 bits<5> rt; 474 bits<3> bp; 475 476 bits<32> Inst; 477 478 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 479 let Inst{25-21} = rs; 480 let Inst{20-16} = rt; 481 let Inst{15-11} = rd; 482 let Inst{10-9} = 0b01; 483 let Inst{8-6} = bp; 484 let Inst{5-0} = Operation.Value; 485 } 486 487 class SPECIAL3_LL_SC_FM<OPCODE6 Operation> : MipsR6Inst { 488 bits<5> rt; 489 bits<21> addr; 490 bits<5> base = addr{20-16}; 491 bits<9> offset = addr{8-0}; 492 493 bits<32> Inst; 494 495 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 496 let Inst{25-21} = base; 497 let Inst{20-16} = rt; 498 let Inst{15-7} = offset; 499 let Inst{5-0} = Operation.Value; 500 501 string DecoderMethod = "DecodeSpecial3LlSc"; 502 } 503 504 class SPECIAL_LSA_FM<OPCODE6 Operation> : MipsR6Inst { 505 bits<5> rd; 506 bits<5> rs; 507 bits<5> rt; 508 bits<2> imm2; 509 510 bits<32> Inst; 511 512 let Inst{31-26} = OPGROUP_SPECIAL.Value; 513 let Inst{25-21} = rs; 514 let Inst{20-16} = rt; 515 let Inst{15-11} = rd; 516 let Inst{10-8} = 0b000; 517 let Inst{7-6} = imm2; 518 let Inst{5-0} = Operation.Value; 519 } 520 521 class REGIMM_FM<OPCODE5 Operation> : MipsR6Inst { 522 bits<5> rs; 523 bits<16> imm; 524 525 bits<32> Inst; 526 527 let Inst{31-26} = OPGROUP_REGIMM.Value; 528 let Inst{25-21} = rs; 529 let Inst{20-16} = Operation.Value; 530 let Inst{15-0} = imm; 531 } 532 533 class COP1_CMP_CONDN_FM<FIELD_CMP_FORMAT Format, 534 FIELD_CMP_COND Cond> : MipsR6Inst { 535 bits<5> fd; 536 bits<5> fs; 537 bits<5> ft; 538 539 bits<32> Inst; 540 541 let Inst{31-26} = OPGROUP_COP1.Value; 542 let Inst{25-21} = Format.Value; 543 let Inst{20-16} = ft; 544 let Inst{15-11} = fs; 545 let Inst{10-6} = fd; 546 let Inst{5} = 0; 547 let Inst{4-0} = Cond.Value; 548 } 549 550 class JR_HB_R6_FM<OPCODE6 Operation> : MipsR6Inst { 551 bits<5> rs; 552 553 bits<32> Inst; 554 555 let Inst{31-26} = OPGROUP_SPECIAL.Value; 556 let Inst{25-21} = rs; 557 let Inst{20-16} = 0; 558 let Inst{15-11} = 0; 559 let Inst{10} = 1; 560 let Inst{9-6} = 0; 561 let Inst{5-0} = Operation.Value; 562 } 563 564 class COP2LDST_FM<OPCODE5 Operation> : MipsR6Inst { 565 bits<5> rt; 566 bits<21> addr; 567 bits<5> base = addr{20-16}; 568 bits<11> offset = addr{10-0}; 569 570 bits<32> Inst; 571 572 let Inst{31-26} = OPGROUP_COP2LDST.Value; 573 let Inst{25-21} = Operation.Value; 574 let Inst{20-16} = rt; 575 let Inst{15-11} = base; 576 let Inst{10-0} = offset; 577 } 578 579 class SPECIAL3_2R_SZ_CRC<bits<2> sz, bits<3> direction> : MipsR6Inst { 580 bits<5> rs; 581 bits<5> rt; 582 583 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 584 let Inst{25-21} = rs; 585 let Inst{20-16} = rt; 586 let Inst{15-11} = 0b00000; 587 let Inst{10-8} = direction; 588 let Inst{7-6} = sz; 589 let Inst{5-0} = 0b001111; 590 591 string DecoderMethod = "DecodeCRC"; 592 } 593 594 class SPECIAL3_GINV<bits<2> ginv> : MipsR6Inst { 595 bits<5> rs; 596 bits<2> type_; 597 598 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 599 let Inst{25-21} = rs; 600 let Inst{20-10} = 0x0; 601 let Inst{9-8} = type_; 602 let Inst{7-6} = ginv; 603 let Inst{5-0} = 0b111101; 604 } 605
