1 //===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>, 11 ASE_MSA { 12 let EncodingPredicates = [HasStdEnc]; 13 let Inst{31-26} = 0b011110; 14 } 15 16 class MSACBranch : MSAInst { 17 let Inst{31-26} = 0b010001; 18 } 19 20 class MSASpecial : MSAInst { 21 let Inst{31-26} = 0b000000; 22 } 23 24 class MSAPseudo<dag outs, dag ins, list<dag> pattern, 25 InstrItinClass itin = IIPseudo>: 26 MipsPseudo<outs, ins, pattern, itin> { 27 let EncodingPredicates = [HasStdEnc]; 28 let ASEPredicate = [HasMSA]; 29 } 30 31 class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst { 32 bits<5> ws; 33 bits<5> wd; 34 bits<3> m; 35 36 let Inst{25-23} = major; 37 let Inst{22-19} = 0b1110; 38 let Inst{18-16} = m; 39 let Inst{15-11} = ws; 40 let Inst{10-6} = wd; 41 let Inst{5-0} = minor; 42 } 43 44 class MSA_BIT_H_FMT<bits<3> major, bits<6> minor>: MSAInst { 45 bits<5> ws; 46 bits<5> wd; 47 bits<4> m; 48 49 let Inst{25-23} = major; 50 let Inst{22-20} = 0b110; 51 let Inst{19-16} = m; 52 let Inst{15-11} = ws; 53 let Inst{10-6} = wd; 54 let Inst{5-0} = minor; 55 } 56 57 class MSA_BIT_W_FMT<bits<3> major, bits<6> minor>: MSAInst { 58 bits<5> ws; 59 bits<5> wd; 60 bits<5> m; 61 62 let Inst{25-23} = major; 63 let Inst{22-21} = 0b10; 64 let Inst{20-16} = m; 65 let Inst{15-11} = ws; 66 let Inst{10-6} = wd; 67 let Inst{5-0} = minor; 68 } 69 70 class MSA_BIT_D_FMT<bits<3> major, bits<6> minor>: MSAInst { 71 bits<5> ws; 72 bits<5> wd; 73 bits<6> m; 74 75 let Inst{25-23} = major; 76 let Inst{22} = 0b0; 77 let Inst{21-16} = m; 78 let Inst{15-11} = ws; 79 let Inst{10-6} = wd; 80 let Inst{5-0} = minor; 81 } 82 83 class MSA_2R_FILL_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst { 84 bits<5> rs; 85 bits<5> wd; 86 87 let Inst{25-18} = major; 88 let Inst{17-16} = df; 89 let Inst{15-11} = rs; 90 let Inst{10-6} = wd; 91 let Inst{5-0} = minor; 92 } 93 94 class MSA_2R_FILL_D_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst { 95 bits<5> rs; 96 bits<5> wd; 97 98 let Inst{25-18} = major; 99 let Inst{17-16} = df; 100 let Inst{15-11} = rs; 101 let Inst{10-6} = wd; 102 let Inst{5-0} = minor; 103 } 104 105 class MSA_2R_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst { 106 bits<5> ws; 107 bits<5> wd; 108 109 let Inst{25-18} = major; 110 let Inst{17-16} = df; 111 let Inst{15-11} = ws; 112 let Inst{10-6} = wd; 113 let Inst{5-0} = minor; 114 } 115 116 class MSA_2RF_FMT<bits<9> major, bits<1> df, bits<6> minor>: MSAInst { 117 bits<5> ws; 118 bits<5> wd; 119 120 let Inst{25-17} = major; 121 let Inst{16} = df; 122 let Inst{15-11} = ws; 123 let Inst{10-6} = wd; 124 let Inst{5-0} = minor; 125 } 126 127 class MSA_3R_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 128 bits<5> wt; 129 bits<5> ws; 130 bits<5> wd; 131 132 let Inst{25-23} = major; 133 let Inst{22-21} = df; 134 let Inst{20-16} = wt; 135 let Inst{15-11} = ws; 136 let Inst{10-6} = wd; 137 let Inst{5-0} = minor; 138 } 139 140 class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst { 141 bits<5> wt; 142 bits<5> ws; 143 bits<5> wd; 144 145 let Inst{25-22} = major; 146 let Inst{21} = df; 147 let Inst{20-16} = wt; 148 let Inst{15-11} = ws; 149 let Inst{10-6} = wd; 150 let Inst{5-0} = minor; 151 } 152 153 class MSA_3R_INDEX_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 154 bits<5> rt; 155 bits<5> ws; 156 bits<5> wd; 157 158 let Inst{25-23} = major; 159 let Inst{22-21} = df; 160 let Inst{20-16} = rt; 161 let Inst{15-11} = ws; 162 let Inst{10-6} = wd; 163 let Inst{5-0} = minor; 164 } 165 166 class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst { 167 bits<5> ws; 168 bits<5> wd; 169 170 let Inst{25-16} = major; 171 let Inst{15-11} = ws; 172 let Inst{10-6} = wd; 173 let Inst{5-0} = minor; 174 } 175 176 class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst { 177 bits<5> rd; 178 bits<5> cs; 179 180 let Inst{25-16} = major; 181 let Inst{15-11} = cs; 182 let Inst{10-6} = rd; 183 let Inst{5-0} = minor; 184 } 185 186 class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst { 187 bits<5> rs; 188 bits<5> cd; 189 190 let Inst{25-16} = major; 191 let Inst{15-11} = rs; 192 let Inst{10-6} = cd; 193 let Inst{5-0} = minor; 194 } 195 196 class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst { 197 bits<4> n; 198 bits<5> ws; 199 bits<5> wd; 200 201 let Inst{25-22} = major; 202 let Inst{21-20} = 0b00; 203 let Inst{19-16} = n{3-0}; 204 let Inst{15-11} = ws; 205 let Inst{10-6} = wd; 206 let Inst{5-0} = minor; 207 } 208 209 class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst { 210 bits<4> n; 211 bits<5> ws; 212 bits<5> wd; 213 214 let Inst{25-22} = major; 215 let Inst{21-19} = 0b100; 216 let Inst{18-16} = n{2-0}; 217 let Inst{15-11} = ws; 218 let Inst{10-6} = wd; 219 let Inst{5-0} = minor; 220 } 221 222 class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst { 223 bits<4> n; 224 bits<5> ws; 225 bits<5> wd; 226 227 let Inst{25-22} = major; 228 let Inst{21-18} = 0b1100; 229 let Inst{17-16} = n{1-0}; 230 let Inst{15-11} = ws; 231 let Inst{10-6} = wd; 232 let Inst{5-0} = minor; 233 } 234 235 class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst { 236 bits<4> n; 237 bits<5> ws; 238 bits<5> wd; 239 240 let Inst{25-22} = major; 241 let Inst{21-17} = 0b11100; 242 let Inst{16} = n{0}; 243 let Inst{15-11} = ws; 244 let Inst{10-6} = wd; 245 let Inst{5-0} = minor; 246 } 247 248 class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst { 249 bits<4> n; 250 bits<5> ws; 251 bits<5> rd; 252 253 let Inst{25-22} = major; 254 let Inst{21-20} = 0b00; 255 let Inst{19-16} = n{3-0}; 256 let Inst{15-11} = ws; 257 let Inst{10-6} = rd; 258 let Inst{5-0} = minor; 259 } 260 261 class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst { 262 bits<4> n; 263 bits<5> ws; 264 bits<5> rd; 265 266 let Inst{25-22} = major; 267 let Inst{21-19} = 0b100; 268 let Inst{18-16} = n{2-0}; 269 let Inst{15-11} = ws; 270 let Inst{10-6} = rd; 271 let Inst{5-0} = minor; 272 } 273 274 class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst { 275 bits<4> n; 276 bits<5> ws; 277 bits<5> rd; 278 279 let Inst{25-22} = major; 280 let Inst{21-18} = 0b1100; 281 let Inst{17-16} = n{1-0}; 282 let Inst{15-11} = ws; 283 let Inst{10-6} = rd; 284 let Inst{5-0} = minor; 285 } 286 287 class MSA_ELM_COPY_D_FMT<bits<4> major, bits<6> minor>: MSAInst { 288 bits<4> n; 289 bits<5> ws; 290 bits<5> rd; 291 292 let Inst{25-22} = major; 293 let Inst{21-17} = 0b11100; 294 let Inst{16} = n{0}; 295 let Inst{15-11} = ws; 296 let Inst{10-6} = rd; 297 let Inst{5-0} = minor; 298 } 299 300 class MSA_ELM_INSERT_B_FMT<bits<4> major, bits<6> minor>: MSAInst { 301 bits<6> n; 302 bits<5> rs; 303 bits<5> wd; 304 305 let Inst{25-22} = major; 306 let Inst{21-20} = 0b00; 307 let Inst{19-16} = n{3-0}; 308 let Inst{15-11} = rs; 309 let Inst{10-6} = wd; 310 let Inst{5-0} = minor; 311 } 312 313 class MSA_ELM_INSERT_H_FMT<bits<4> major, bits<6> minor>: MSAInst { 314 bits<6> n; 315 bits<5> rs; 316 bits<5> wd; 317 318 let Inst{25-22} = major; 319 let Inst{21-19} = 0b100; 320 let Inst{18-16} = n{2-0}; 321 let Inst{15-11} = rs; 322 let Inst{10-6} = wd; 323 let Inst{5-0} = minor; 324 } 325 326 class MSA_ELM_INSERT_W_FMT<bits<4> major, bits<6> minor>: MSAInst { 327 bits<6> n; 328 bits<5> rs; 329 bits<5> wd; 330 331 let Inst{25-22} = major; 332 let Inst{21-18} = 0b1100; 333 let Inst{17-16} = n{1-0}; 334 let Inst{15-11} = rs; 335 let Inst{10-6} = wd; 336 let Inst{5-0} = minor; 337 } 338 339 class MSA_ELM_INSERT_D_FMT<bits<4> major, bits<6> minor>: MSAInst { 340 bits<6> n; 341 bits<5> rs; 342 bits<5> wd; 343 344 let Inst{25-22} = major; 345 let Inst{21-17} = 0b11100; 346 let Inst{16} = n{0}; 347 let Inst{15-11} = rs; 348 let Inst{10-6} = wd; 349 let Inst{5-0} = minor; 350 } 351 352 class MSA_I5_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 353 bits<5> imm; 354 bits<5> ws; 355 bits<5> wd; 356 357 let Inst{25-23} = major; 358 let Inst{22-21} = df; 359 let Inst{20-16} = imm; 360 let Inst{15-11} = ws; 361 let Inst{10-6} = wd; 362 let Inst{5-0} = minor; 363 } 364 365 class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst { 366 bits<8> u8; 367 bits<5> ws; 368 bits<5> wd; 369 370 let Inst{25-24} = major; 371 let Inst{23-16} = u8; 372 let Inst{15-11} = ws; 373 let Inst{10-6} = wd; 374 let Inst{5-0} = minor; 375 } 376 377 class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 378 bits<10> s10; 379 bits<5> wd; 380 381 let Inst{25-23} = major; 382 let Inst{22-21} = df; 383 let Inst{20-11} = s10; 384 let Inst{10-6} = wd; 385 let Inst{5-0} = minor; 386 } 387 388 class MSA_MI10_FMT<bits<2> df, bits<4> minor>: MSAInst { 389 bits<21> addr; 390 bits<5> wd; 391 392 let Inst{25-16} = addr{9-0}; 393 let Inst{15-11} = addr{20-16}; 394 let Inst{10-6} = wd; 395 let Inst{5-2} = minor; 396 let Inst{1-0} = df; 397 } 398 399 class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst { 400 bits<5> wt; 401 bits<5> ws; 402 bits<5> wd; 403 404 let Inst{25-21} = major; 405 let Inst{20-16} = wt; 406 let Inst{15-11} = ws; 407 let Inst{10-6} = wd; 408 let Inst{5-0} = minor; 409 } 410 411 class MSA_CBRANCH_FMT<bits<3> major, bits<2> df>: MSACBranch { 412 bits<16> offset; 413 bits<5> wt; 414 415 let Inst{25-23} = major; 416 let Inst{22-21} = df; 417 let Inst{20-16} = wt; 418 let Inst{15-0} = offset; 419 } 420 421 class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch { 422 bits<16> offset; 423 bits<5> wt; 424 425 let Inst{25-21} = major; 426 let Inst{20-16} = wt; 427 let Inst{15-0} = offset; 428 } 429 430 class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial { 431 bits<5> rs; 432 bits<5> rt; 433 bits<5> rd; 434 bits<2> sa; 435 436 let Inst{25-21} = rs; 437 let Inst{20-16} = rt; 438 let Inst{15-11} = rd; 439 let Inst{10-8} = 0b000; 440 let Inst{7-6} = sa; 441 let Inst{5-0} = minor; 442 } 443 444 class SPECIAL_DLSA_FMT<bits<6> minor>: MSASpecial { 445 bits<5> rs; 446 bits<5> rt; 447 bits<5> rd; 448 bits<2> sa; 449 450 let Inst{25-21} = rs; 451 let Inst{20-16} = rt; 452 let Inst{15-11} = rd; 453 let Inst{10-8} = 0b000; 454 let Inst{7-6} = sa; 455 let Inst{5-0} = minor; 456 } 457
