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      1 //===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 //
     11 //===----------------------------------------------------------------------===//
     12 
     13 //===----------------------------------------------------------------------===//
     14 // Target-independent interfaces which we are implementing
     15 //===----------------------------------------------------------------------===//
     16 
     17 include "llvm/Target/Target.td"
     18 
     19 //===----------------------------------------------------------------------===//
     20 // SPARC Subtarget features.
     21 //
     22 
     23 def FeatureSoftMulDiv
     24   : SubtargetFeature<"soft-mul-div", "UseSoftMulDiv", "true",
     25                      "Use software emulation for integer multiply and divide">;
     26 
     27 def FeatureNoFSMULD
     28   : SubtargetFeature<"no-fsmuld", "HasNoFSMULD", "true",
     29                      "Disable the fsmuld instruction.">;
     30 def FeatureNoFMULS
     31   : SubtargetFeature<"no-fmuls", "HasNoFMULS", "true",
     32                      "Disable the fmuls instruction.">;
     33 
     34 def FeatureV9
     35   : SubtargetFeature<"v9", "IsV9", "true",
     36                      "Enable SPARC-V9 instructions">;
     37 def FeatureV8Deprecated
     38   : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
     39                      "Enable deprecated V8 instructions in V9 mode">;
     40 def FeatureVIS
     41   : SubtargetFeature<"vis", "IsVIS", "true",
     42                      "Enable UltraSPARC Visual Instruction Set extensions">;
     43 def FeatureVIS2
     44   : SubtargetFeature<"vis2", "IsVIS2", "true",
     45                      "Enable Visual Instruction Set extensions II">;
     46 def FeatureVIS3
     47   : SubtargetFeature<"vis3", "IsVIS3", "true",
     48                      "Enable Visual Instruction Set extensions III">;
     49 def FeatureLeon
     50   : SubtargetFeature<"leon", "IsLeon", "true",
     51                      "Enable LEON extensions">;
     52 
     53 def FeatureHardQuad
     54   : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
     55                      "Enable quad-word floating point instructions">;
     56 
     57 def UsePopc : SubtargetFeature<"popc", "UsePopc", "true",
     58                                "Use the popc (population count) instruction">;
     59 
     60 def FeatureSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat", "true",
     61                               "Use software emulation for floating point">;
     62 
     63 //==== Features added predmoninantly for LEON subtarget support
     64 include "LeonFeatures.td"
     65 
     66 //===----------------------------------------------------------------------===//
     67 // Register File, Calling Conv, Instruction Descriptions
     68 //===----------------------------------------------------------------------===//
     69 
     70 include "SparcRegisterInfo.td"
     71 include "SparcCallingConv.td"
     72 include "SparcSchedule.td"
     73 include "SparcInstrInfo.td"
     74 
     75 def SparcInstrInfo : InstrInfo;
     76 
     77 def SparcAsmParser : AsmParser {
     78   bit ShouldEmitMatchRegisterName = 0;
     79 }
     80 
     81 //===----------------------------------------------------------------------===//
     82 // SPARC processors supported.
     83 //===----------------------------------------------------------------------===//
     84 
     85 class Proc<string Name, list<SubtargetFeature> Features>
     86  : Processor<Name, NoItineraries, Features>;
     87 
     88 def : Proc<"generic",         []>;
     89 def : Proc<"v7",              [FeatureSoftMulDiv, FeatureNoFSMULD]>;
     90 def : Proc<"v8",              []>;
     91 def : Proc<"supersparc",      []>;
     92 def : Proc<"sparclite",       []>;
     93 def : Proc<"f934",            []>;
     94 def : Proc<"hypersparc",      []>;
     95 def : Proc<"sparclite86x",    []>;
     96 def : Proc<"sparclet",        []>;
     97 def : Proc<"tsc701",          []>;
     98 def : Proc<"myriad2",         [FeatureLeon, LeonCASA]>;
     99 def : Proc<"myriad2.1",       [FeatureLeon, LeonCASA]>;
    100 def : Proc<"myriad2.2",       [FeatureLeon, LeonCASA]>;
    101 def : Proc<"myriad2.3",       [FeatureLeon, LeonCASA]>;
    102 def : Proc<"ma2100",          [FeatureLeon, LeonCASA]>;
    103 def : Proc<"ma2150",          [FeatureLeon, LeonCASA]>;
    104 def : Proc<"ma2155",          [FeatureLeon, LeonCASA]>;
    105 def : Proc<"ma2450",          [FeatureLeon, LeonCASA]>;
    106 def : Proc<"ma2455",          [FeatureLeon, LeonCASA]>;
    107 def : Proc<"ma2x5x",          [FeatureLeon, LeonCASA]>;
    108 def : Proc<"ma2080",          [FeatureLeon, LeonCASA]>;
    109 def : Proc<"ma2085",          [FeatureLeon, LeonCASA]>;
    110 def : Proc<"ma2480",          [FeatureLeon, LeonCASA]>;
    111 def : Proc<"ma2485",          [FeatureLeon, LeonCASA]>;
    112 def : Proc<"ma2x8x",          [FeatureLeon, LeonCASA]>;
    113 def : Proc<"v9",              [FeatureV9]>;
    114 def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
    115 def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated, FeatureVIS,
    116                                FeatureVIS2]>;
    117 def : Proc<"niagara",         [FeatureV9, FeatureV8Deprecated, FeatureVIS,
    118                                FeatureVIS2]>;
    119 def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated, UsePopc,
    120                                FeatureVIS, FeatureVIS2]>;
    121 def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated, UsePopc,
    122                                FeatureVIS, FeatureVIS2]>;
    123 def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated, UsePopc,
    124                                FeatureVIS, FeatureVIS2, FeatureVIS3]>;
    125 
    126 // LEON 2 FT generic
    127 def : Processor<"leon2", LEON2Itineraries,
    128                 [FeatureLeon]>;
    129 
    130 // LEON 2 FT (AT697E)
    131 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
    132 def : Processor<"at697e", LEON2Itineraries,
    133                 [FeatureLeon, InsertNOPLoad]>;
    134 
    135 // LEON 2 FT (AT697F)
    136 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
    137 def : Processor<"at697f", LEON2Itineraries,
    138                 [FeatureLeon, InsertNOPLoad]>;
    139 
    140 
    141 // LEON 3 FT generic
    142 def : Processor<"leon3", LEON3Itineraries,
    143                 [FeatureLeon, UMACSMACSupport]>;
    144 
    145 // LEON 3 FT (UT699). Provides features for the UT699 processor
    146 // - covers all the erratum fixes for LEON3, but does not support the CASA instruction.
    147 def : Processor<"ut699", LEON3Itineraries,
    148                 [FeatureLeon, InsertNOPLoad, FeatureNoFSMULD, FeatureNoFMULS, FixAllFDIVSQRT]>;
    149 
    150 // LEON3 FT (GR712RC). Provides features for the GR712RC processor.
    151 // - covers all the erratum fixed for LEON3 and support for the CASA instruction. 
    152 def : Processor<"gr712rc", LEON3Itineraries,
    153                 [FeatureLeon, LeonCASA]>;
    154 
    155 // LEON 4 FT generic
    156 def : Processor<"leon4", LEON4Itineraries,
    157                 [FeatureLeon, UMACSMACSupport, LeonCASA]>;
    158 
    159 // LEON 4 FT (GR740) 
    160 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
    161 def : Processor<"gr740", LEON4Itineraries, 
    162                 [FeatureLeon, UMACSMACSupport, LeonCASA]>;
    163 
    164 //===----------------------------------------------------------------------===//
    165 // Declare the target which we are implementing
    166 //===----------------------------------------------------------------------===//
    167 
    168 def SparcAsmWriter : AsmWriter {
    169   string AsmWriterClassName  = "InstPrinter";
    170   int PassSubtarget = 1;
    171   int Variant = 0;
    172 }
    173 
    174 def Sparc : Target {
    175   // Pull in Instruction Info:
    176   let InstructionSet = SparcInstrInfo;
    177   let AssemblyParsers  = [SparcAsmParser];
    178   let AssemblyWriters = [SparcAsmWriter];
    179   let AllowRegisterRenaming = 1;
    180 }
    181