1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 //===----------------------------------------------------------------------===// 11 // Type profiles 12 //===----------------------------------------------------------------------===// 13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 14 SDTCisVT<1, i64>]>; 15 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 16 SDTCisVT<1, i64>]>; 17 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 18 def SDT_ZCmp : SDTypeProfile<1, 2, 19 [SDTCisVT<0, i32>, 20 SDTCisSameAs<1, 2>]>; 21 def SDT_ZICmp : SDTypeProfile<1, 3, 22 [SDTCisVT<0, i32>, 23 SDTCisSameAs<1, 2>, 24 SDTCisVT<3, i32>]>; 25 def SDT_ZBRCCMask : SDTypeProfile<0, 4, 26 [SDTCisVT<0, i32>, 27 SDTCisVT<1, i32>, 28 SDTCisVT<2, OtherVT>, 29 SDTCisVT<3, i32>]>; 30 def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 31 [SDTCisSameAs<0, 1>, 32 SDTCisSameAs<1, 2>, 33 SDTCisVT<3, i32>, 34 SDTCisVT<4, i32>, 35 SDTCisVT<5, i32>]>; 36 def SDT_ZWrapPtr : SDTypeProfile<1, 1, 37 [SDTCisSameAs<0, 1>, 38 SDTCisPtrTy<0>]>; 39 def SDT_ZWrapOffset : SDTypeProfile<1, 2, 40 [SDTCisSameAs<0, 1>, 41 SDTCisSameAs<0, 2>, 42 SDTCisPtrTy<0>]>; 43 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 44 def SDT_ZGR128Binary : SDTypeProfile<1, 2, 45 [SDTCisVT<0, untyped>, 46 SDTCisInt<1>, 47 SDTCisInt<2>]>; 48 def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 49 [SDTCisInt<0>, 50 SDTCisVT<1, i32>, 51 SDTCisSameAs<0, 2>, 52 SDTCisSameAs<0, 3>]>; 53 def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 54 [SDTCisInt<0>, 55 SDTCisVT<1, i32>, 56 SDTCisSameAs<0, 2>, 57 SDTCisSameAs<0, 3>, 58 SDTCisVT<1, i32>]>; 59 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 60 [SDTCisVT<0, i32>, 61 SDTCisPtrTy<1>, 62 SDTCisVT<2, i32>, 63 SDTCisVT<3, i32>, 64 SDTCisVT<4, i32>, 65 SDTCisVT<5, i32>]>; 66 def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 67 [SDTCisVT<0, i32>, 68 SDTCisVT<1, i32>, 69 SDTCisPtrTy<2>, 70 SDTCisVT<3, i32>, 71 SDTCisVT<4, i32>, 72 SDTCisVT<5, i32>, 73 SDTCisVT<6, i32>, 74 SDTCisVT<7, i32>]>; 75 def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 76 [SDTCisInt<0>, 77 SDTCisVT<1, i32>, 78 SDTCisPtrTy<2>, 79 SDTCisSameAs<0, 3>, 80 SDTCisSameAs<0, 4>]>; 81 def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 82 [SDTCisVT<0, untyped>, 83 SDTCisPtrTy<1>]>; 84 def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 85 [SDTCisVT<0, untyped>, 86 SDTCisPtrTy<1>]>; 87 def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 88 [SDTCisVT<0, untyped>, 89 SDTCisVT<1, i32>, 90 SDTCisPtrTy<2>, 91 SDTCisVT<3, untyped>, 92 SDTCisVT<4, untyped>]>; 93 def SDT_ZMemMemLength : SDTypeProfile<0, 3, 94 [SDTCisPtrTy<0>, 95 SDTCisPtrTy<1>, 96 SDTCisVT<2, i64>]>; 97 def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 98 [SDTCisVT<0, i32>, 99 SDTCisPtrTy<1>, 100 SDTCisPtrTy<2>, 101 SDTCisVT<3, i64>]>; 102 def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 103 [SDTCisPtrTy<0>, 104 SDTCisPtrTy<1>, 105 SDTCisVT<2, i64>, 106 SDTCisVT<3, i64>]>; 107 def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 108 [SDTCisVT<0, i32>, 109 SDTCisPtrTy<1>, 110 SDTCisPtrTy<2>, 111 SDTCisVT<3, i64>, 112 SDTCisVT<4, i64>]>; 113 def SDT_ZString : SDTypeProfile<1, 3, 114 [SDTCisPtrTy<0>, 115 SDTCisPtrTy<1>, 116 SDTCisPtrTy<2>, 117 SDTCisVT<3, i32>]>; 118 def SDT_ZStringCC : SDTypeProfile<2, 3, 119 [SDTCisPtrTy<0>, 120 SDTCisVT<1, i32>, 121 SDTCisPtrTy<2>, 122 SDTCisPtrTy<3>, 123 SDTCisVT<4, i32>]>; 124 def SDT_ZIPM : SDTypeProfile<1, 1, 125 [SDTCisVT<0, i32>, 126 SDTCisVT<1, i32>]>; 127 def SDT_ZPrefetch : SDTypeProfile<0, 2, 128 [SDTCisVT<0, i32>, 129 SDTCisPtrTy<1>]>; 130 def SDT_ZLoadBSwap : SDTypeProfile<1, 2, 131 [SDTCisInt<0>, 132 SDTCisPtrTy<1>, 133 SDTCisVT<2, OtherVT>]>; 134 def SDT_ZStoreBSwap : SDTypeProfile<0, 3, 135 [SDTCisInt<0>, 136 SDTCisPtrTy<1>, 137 SDTCisVT<2, OtherVT>]>; 138 def SDT_ZTBegin : SDTypeProfile<1, 2, 139 [SDTCisVT<0, i32>, 140 SDTCisPtrTy<1>, 141 SDTCisVT<2, i32>]>; 142 def SDT_ZTEnd : SDTypeProfile<1, 0, 143 [SDTCisVT<0, i32>]>; 144 def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 145 [SDTCisVec<0>, 146 SDTCisSameAs<0, 1>, 147 SDTCisVT<3, i32>]>; 148 def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 149 [SDTCisVec<1>, 150 SDTCisVT<2, i32>]>; 151 def SDT_ZReplicate : SDTypeProfile<1, 1, 152 [SDTCisVec<0>]>; 153 def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 154 [SDTCisVec<0>, 155 SDTCisVec<1>]>; 156 def SDT_ZVecUnary : SDTypeProfile<1, 1, 157 [SDTCisVec<0>, 158 SDTCisSameAs<0, 1>]>; 159 def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 160 [SDTCisVec<0>, 161 SDTCisVT<1, i32>, 162 SDTCisSameAs<0, 2>]>; 163 def SDT_ZVecBinary : SDTypeProfile<1, 2, 164 [SDTCisVec<0>, 165 SDTCisSameAs<0, 1>, 166 SDTCisSameAs<0, 2>]>; 167 def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 168 [SDTCisVec<0>, 169 SDTCisVT<1, i32>, 170 SDTCisSameAs<0, 2>, 171 SDTCisSameAs<0, 2>]>; 172 def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 173 [SDTCisVec<0>, 174 SDTCisSameAs<0, 1>, 175 SDTCisVT<2, i32>]>; 176 def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 177 [SDTCisVec<0>, 178 SDTCisVec<1>, 179 SDTCisSameAs<1, 2>]>; 180 def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 181 [SDTCisVec<0>, 182 SDTCisVT<1, i32>, 183 SDTCisVec<2>, 184 SDTCisSameAs<2, 3>]>; 185 def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 186 [SDTCisVec<0>, 187 SDTCisVT<1, i32>, 188 SDTCisVec<2>, 189 SDTCisVT<3, i32>]>; 190 def SDT_ZRotateMask : SDTypeProfile<1, 2, 191 [SDTCisVec<0>, 192 SDTCisVT<1, i32>, 193 SDTCisVT<2, i32>]>; 194 def SDT_ZJoinDwords : SDTypeProfile<1, 2, 195 [SDTCisVT<0, v2i64>, 196 SDTCisVT<1, i64>, 197 SDTCisVT<2, i64>]>; 198 def SDT_ZVecTernary : SDTypeProfile<1, 3, 199 [SDTCisVec<0>, 200 SDTCisSameAs<0, 1>, 201 SDTCisSameAs<0, 2>, 202 SDTCisSameAs<0, 3>]>; 203 def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 204 [SDTCisVec<0>, 205 SDTCisSameAs<0, 1>, 206 SDTCisSameAs<0, 2>, 207 SDTCisVT<3, i32>]>; 208 def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 209 [SDTCisVec<0>, 210 SDTCisVT<1, i32>, 211 SDTCisSameAs<0, 2>, 212 SDTCisSameAs<0, 3>, 213 SDTCisVT<4, i32>]>; 214 def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 215 [SDTCisVec<0>, 216 SDTCisSameAs<0, 1>, 217 SDTCisSameAs<0, 2>, 218 SDTCisSameAs<0, 3>, 219 SDTCisVT<4, i32>]>; 220 def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 221 [SDTCisVec<0>, 222 SDTCisVT<1, i32>, 223 SDTCisSameAs<0, 2>, 224 SDTCisSameAs<0, 3>, 225 SDTCisSameAs<0, 4>, 226 SDTCisVT<5, i32>]>; 227 def SDT_ZTest : SDTypeProfile<1, 2, 228 [SDTCisVT<0, i32>, 229 SDTCisVT<2, i64>]>; 230 231 //===----------------------------------------------------------------------===// 232 // Node definitions 233 //===----------------------------------------------------------------------===// 234 235 // These are target-independent nodes, but have target-specific formats. 236 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 237 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 238 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 239 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 240 SDNPOutGlue]>; 241 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 242 243 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 244 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 245 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 246 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 247 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 248 SDNPVariadic]>; 249 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 250 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 251 SDNPVariadic]>; 252 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 253 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 254 SDNPVariadic]>; 255 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 256 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 257 SDNPVariadic]>; 258 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 259 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 260 SDT_ZWrapOffset, []>; 261 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 262 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 263 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 264 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 265 def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 266 [SDNPHasChain]>; 267 def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 268 SDT_ZSelectCCMask>; 269 def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 270 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 271 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 272 def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 273 def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 274 def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 275 def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 276 def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 277 def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 278 def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 279 def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 280 def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 281 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 282 283 def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 284 [SDNPHasChain, SDNPSideEffect]>; 285 286 def z_loadbswap : SDNode<"SystemZISD::LRV", SDT_ZLoadBSwap, 287 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 288 def z_storebswap : SDNode<"SystemZISD::STRV", SDT_ZStoreBSwap, 289 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 290 291 def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 292 293 // Defined because the index is an i32 rather than a pointer. 294 def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 295 SDT_ZInsertVectorElt>; 296 def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 297 SDT_ZExtractVectorElt>; 298 def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 299 def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 300 def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 301 def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 302 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 303 def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 304 def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 305 def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 306 def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 307 SDT_ZVecTernaryInt>; 308 def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 309 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 310 def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 311 def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 312 def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 313 def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 314 def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 315 def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 316 def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 317 SDT_ZVecBinaryInt>; 318 def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 319 SDT_ZVecBinaryInt>; 320 def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 321 SDT_ZVecBinaryInt>; 322 def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 323 def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 324 def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 325 def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 326 def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 327 def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 328 def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 329 def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 330 def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 331 def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 332 def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 333 def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 334 def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 335 def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 336 def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 337 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 338 def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 339 def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 340 def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 341 def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 342 def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 343 def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 344 def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 345 def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 346 SDT_ZVecQuaternaryIntCC>; 347 def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 348 SDT_ZVecQuaternaryIntCC>; 349 def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 350 351 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 352 : SDNode<"SystemZISD::"##name, profile, 353 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 354 355 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 356 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 357 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 358 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 359 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 360 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 361 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 362 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 363 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 364 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 365 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 366 367 def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 368 SDT_ZAtomicCmpSwap, 369 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 370 SDNPMemOperand]>; 371 def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 372 SDT_ZAtomicCmpSwapW, 373 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 374 SDNPMemOperand]>; 375 376 def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 377 SDT_ZAtomicLoad128, 378 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 379 def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 380 SDT_ZAtomicStore128, 381 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 382 def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 383 SDT_ZAtomicCmpSwap128, 384 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 385 SDNPMemOperand]>; 386 387 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 388 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 389 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 390 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 391 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 393 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 394 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 395 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 396 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 397 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 398 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 399 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 400 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 401 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 402 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 403 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 404 [SDNPHasChain, SDNPMayLoad]>; 405 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 406 [SDNPHasChain, SDNPMayLoad]>; 407 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 408 [SDNPHasChain, SDNPMayLoad]>; 409 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 410 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 411 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 412 [SDNPHasChain, SDNPMayLoad]>; 413 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 414 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 415 SDNPMemOperand]>; 416 417 def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 418 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 419 def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 420 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 421 def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 422 [SDNPHasChain, SDNPSideEffect]>; 423 424 def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 425 def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 426 def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 427 428 //===----------------------------------------------------------------------===// 429 // Pattern fragments 430 //===----------------------------------------------------------------------===// 431 432 def z_lrvh : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i16)>; 433 def z_lrv : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i32)>; 434 def z_lrvg : PatFrag<(ops node:$addr), (z_loadbswap node:$addr, i64)>; 435 436 def z_strvh : PatFrag<(ops node:$src, node:$addr), 437 (z_storebswap node:$src, node:$addr, i16)>; 438 def z_strv : PatFrag<(ops node:$src, node:$addr), 439 (z_storebswap node:$src, node:$addr, i32)>; 440 def z_strvg : PatFrag<(ops node:$src, node:$addr), 441 (z_storebswap node:$src, node:$addr, i64)>; 442 443 // Fragments including CC as an implicit source. 444 def z_br_ccmask 445 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 446 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 447 def z_select_ccmask 448 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 449 (z_select_ccmask_1 node:$true, node:$false, 450 node:$valid, node:$mask, CC)>; 451 def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 452 def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 453 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 454 def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 455 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 456 457 // Signed and unsigned comparisons. 458 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 459 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 460 return Type != SystemZICMP::UnsignedOnly; 461 }]>; 462 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 463 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 464 return Type != SystemZICMP::SignedOnly; 465 }]>; 466 467 // Register- and memory-based TEST UNDER MASK. 468 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 469 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 470 471 // Register sign-extend operations. Sub-32-bit values are represented as i32s. 472 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 473 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 474 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 475 476 // Match extensions of an i32 to an i64, followed by an in-register sign 477 // extension from a sub-i32 value. 478 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 479 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 480 481 // Register zero-extend operations. Sub-32-bit values are represented as i32s. 482 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 483 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 484 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 485 486 // Extending loads in which the extension type can be signed. 487 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 488 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 489 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 490 }]>; 491 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 492 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 493 }]>; 494 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 495 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 496 }]>; 497 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 498 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 499 }]>; 500 501 // Extending loads in which the extension type can be unsigned. 502 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 503 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 504 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 505 }]>; 506 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 507 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 508 }]>; 509 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 510 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 511 }]>; 512 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 513 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 514 }]>; 515 516 // Extending loads in which the extension type doesn't matter. 517 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 518 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 519 }]>; 520 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 521 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 522 }]>; 523 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 524 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 525 }]>; 526 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 527 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 528 }]>; 529 530 // Aligned loads. 531 class AlignedLoad<SDPatternOperator load> 532 : PatFrag<(ops node:$addr), (load node:$addr), [{ 533 auto *Load = cast<LoadSDNode>(N); 534 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 535 }]>; 536 def aligned_load : AlignedLoad<load>; 537 def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 538 def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 539 def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 540 def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 541 542 // Aligned stores. 543 class AlignedStore<SDPatternOperator store> 544 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 545 auto *Store = cast<StoreSDNode>(N); 546 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 547 }]>; 548 def aligned_store : AlignedStore<store>; 549 def aligned_truncstorei16 : AlignedStore<truncstorei16>; 550 def aligned_truncstorei32 : AlignedStore<truncstorei32>; 551 552 // Non-volatile loads. Used for instructions that might access the storage 553 // location multiple times. 554 class NonvolatileLoad<SDPatternOperator load> 555 : PatFrag<(ops node:$addr), (load node:$addr), [{ 556 auto *Load = cast<LoadSDNode>(N); 557 return !Load->isVolatile(); 558 }]>; 559 def nonvolatile_load : NonvolatileLoad<load>; 560 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 561 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 562 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 563 564 // Non-volatile stores. 565 class NonvolatileStore<SDPatternOperator store> 566 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 567 auto *Store = cast<StoreSDNode>(N); 568 return !Store->isVolatile(); 569 }]>; 570 def nonvolatile_store : NonvolatileStore<store>; 571 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 572 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 573 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 574 575 // A store of a load that can be implemented using MVC. 576 def mvc_store : PatFrag<(ops node:$value, node:$addr), 577 (unindexedstore node:$value, node:$addr), 578 [{ return storeLoadCanUseMVC(N); }]>; 579 580 // Binary read-modify-write operations on memory in which the other 581 // operand is also memory and for which block operations like NC can 582 // be used. There are two patterns for each operator, depending on 583 // which operand contains the "other" load. 584 multiclass block_op<SDPatternOperator operator> { 585 def "1" : PatFrag<(ops node:$value, node:$addr), 586 (unindexedstore (operator node:$value, 587 (unindexedload node:$addr)), 588 node:$addr), 589 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 590 def "2" : PatFrag<(ops node:$value, node:$addr), 591 (unindexedstore (operator (unindexedload node:$addr), 592 node:$value), 593 node:$addr), 594 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 595 } 596 defm block_and : block_op<and>; 597 defm block_or : block_op<or>; 598 defm block_xor : block_op<xor>; 599 600 // Insertions. 601 def inserti8 : PatFrag<(ops node:$src1, node:$src2), 602 (or (and node:$src1, -256), node:$src2)>; 603 def insertll : PatFrag<(ops node:$src1, node:$src2), 604 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 605 def insertlh : PatFrag<(ops node:$src1, node:$src2), 606 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 607 def inserthl : PatFrag<(ops node:$src1, node:$src2), 608 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 609 def inserthh : PatFrag<(ops node:$src1, node:$src2), 610 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 611 def insertlf : PatFrag<(ops node:$src1, node:$src2), 612 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 613 def inserthf : PatFrag<(ops node:$src1, node:$src2), 614 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 615 616 // ORs that can be treated as insertions. 617 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 618 (or node:$src1, node:$src2), [{ 619 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 620 return CurDAG->MaskedValueIsZero(N->getOperand(0), 621 APInt::getLowBitsSet(BitWidth, 8)); 622 }]>; 623 624 // ORs that can be treated as reversed insertions. 625 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 626 (or node:$src1, node:$src2), [{ 627 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 628 return CurDAG->MaskedValueIsZero(N->getOperand(1), 629 APInt::getLowBitsSet(BitWidth, 8)); 630 }]>; 631 632 // Negative integer absolute. 633 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 634 635 // Integer absolute, matching the canonical form generated by DAGCombiner. 636 def z_iabs32 : PatFrag<(ops node:$src), 637 (xor (add node:$src, (sra node:$src, (i32 31))), 638 (sra node:$src, (i32 31)))>; 639 def z_iabs64 : PatFrag<(ops node:$src), 640 (xor (add node:$src, (sra node:$src, (i32 63))), 641 (sra node:$src, (i32 63)))>; 642 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 643 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 644 645 // Integer multiply-and-add 646 def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 647 (add (mul node:$src1, node:$src2), node:$src3)>; 648 649 // Alternatives to match operations with or without an overflow CC result. 650 def z_sadd : PatFrags<(ops node:$src1, node:$src2), 651 [(z_saddo node:$src1, node:$src2), 652 (add node:$src1, node:$src2)]>; 653 def z_uadd : PatFrags<(ops node:$src1, node:$src2), 654 [(z_uaddo node:$src1, node:$src2), 655 (add node:$src1, node:$src2)]>; 656 def z_ssub : PatFrags<(ops node:$src1, node:$src2), 657 [(z_ssubo node:$src1, node:$src2), 658 (sub node:$src1, node:$src2)]>; 659 def z_usub : PatFrags<(ops node:$src1, node:$src2), 660 [(z_usubo node:$src1, node:$src2), 661 (sub node:$src1, node:$src2)]>; 662 663 // Fused multiply-subtract, using the natural operand order. 664 def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 665 (fma node:$src1, node:$src2, (fneg node:$src3))>; 666 667 // Fused multiply-add and multiply-subtract, but with the order of the 668 // operands matching SystemZ's MA and MS instructions. 669 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 670 (fma node:$src2, node:$src3, node:$src1)>; 671 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 672 (fma node:$src2, node:$src3, (fneg node:$src1))>; 673 674 // Negative fused multiply-add and multiply-subtract. 675 def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 676 (fneg (fma node:$src1, node:$src2, node:$src3))>; 677 def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 678 (fneg (fms node:$src1, node:$src2, node:$src3))>; 679 680 // Floating-point negative absolute. 681 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 682 683 // Create a unary operator that loads from memory and then performs 684 // the given operation on it. 685 class loadu<SDPatternOperator operator, SDPatternOperator load = load> 686 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 687 688 // Create a store operator that performs the given unary operation 689 // on the value before storing it. 690 class storeu<SDPatternOperator operator, SDPatternOperator store = store> 691 : PatFrag<(ops node:$value, node:$addr), 692 (store (operator node:$value), node:$addr)>; 693 694 // Create a store operator that performs the given inherent operation 695 // and stores the resulting value. 696 class storei<SDPatternOperator operator, SDPatternOperator store = store> 697 : PatFrag<(ops node:$addr), 698 (store (operator), node:$addr)>; 699 700 // Create a shift operator that optionally ignores an AND of the 701 // shift count with an immediate if the bottom 6 bits are all set. 702 def imm32bottom6set : PatLeaf<(i32 imm), [{ 703 return (N->getZExtValue() & 0x3f) == 0x3f; 704 }]>; 705 class shiftop<SDPatternOperator operator> 706 : PatFrags<(ops node:$val, node:$count), 707 [(operator node:$val, node:$count), 708 (operator node:$val, (and node:$count, imm32bottom6set))]>; 709 710 // Vector representation of all-zeros and all-ones. 711 def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>; 712 def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>; 713 714 // Load a scalar and replicate it in all elements of a vector. 715 class z_replicate_load<ValueType scalartype, SDPatternOperator load> 716 : PatFrag<(ops node:$addr), 717 (z_replicate (scalartype (load node:$addr)))>; 718 def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 719 def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 720 def z_replicate_loadi32 : z_replicate_load<i32, load>; 721 def z_replicate_loadi64 : z_replicate_load<i64, load>; 722 def z_replicate_loadf32 : z_replicate_load<f32, load>; 723 def z_replicate_loadf64 : z_replicate_load<f64, load>; 724 725 // Load a scalar and insert it into a single element of a vector. 726 class z_vle<ValueType scalartype, SDPatternOperator load> 727 : PatFrag<(ops node:$vec, node:$addr, node:$index), 728 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 729 node:$index)>; 730 def z_vlei8 : z_vle<i32, anyextloadi8>; 731 def z_vlei16 : z_vle<i32, anyextloadi16>; 732 def z_vlei32 : z_vle<i32, load>; 733 def z_vlei64 : z_vle<i64, load>; 734 def z_vlef32 : z_vle<f32, load>; 735 def z_vlef64 : z_vle<f64, load>; 736 737 // Load a scalar and insert it into the low element of the high i64 of a 738 // zeroed vector. 739 class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 740 : PatFrag<(ops node:$addr), 741 (z_vector_insert (z_vzero), 742 (scalartype (load node:$addr)), (i32 index))>; 743 def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 744 def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 745 def z_vllezi32 : z_vllez<i32, load, 1>; 746 def z_vllezi64 : PatFrag<(ops node:$addr), 747 (z_join_dwords (i64 (load node:$addr)), (i64 0))>; 748 // We use high merges to form a v4f32 from four f32s. Propagating zero 749 // into all elements but index 1 gives this expression. 750 def z_vllezf32 : PatFrag<(ops node:$addr), 751 (bitconvert 752 (z_merge_high 753 (v2i64 754 (z_unpackl_high 755 (v4i32 756 (bitconvert 757 (v4f32 (scalar_to_vector 758 (f32 (load node:$addr)))))))), 759 (v2i64 (z_vzero))))>; 760 def z_vllezf64 : PatFrag<(ops node:$addr), 761 (z_merge_high 762 (scalar_to_vector (f64 (load node:$addr))), 763 (z_vzero))>; 764 765 // Similarly for the high element of a zeroed vector. 766 def z_vllezli32 : z_vllez<i32, load, 0>; 767 def z_vllezlf32 : PatFrag<(ops node:$addr), 768 (bitconvert 769 (z_merge_high 770 (v2i64 771 (bitconvert 772 (z_merge_high 773 (v4f32 (scalar_to_vector 774 (f32 (load node:$addr)))), 775 (v4f32 (z_vzero))))), 776 (v2i64 (z_vzero))))>; 777 778 // Store one element of a vector. 779 class z_vste<ValueType scalartype, SDPatternOperator store> 780 : PatFrag<(ops node:$vec, node:$addr, node:$index), 781 (store (scalartype (z_vector_extract node:$vec, node:$index)), 782 node:$addr)>; 783 def z_vstei8 : z_vste<i32, truncstorei8>; 784 def z_vstei16 : z_vste<i32, truncstorei16>; 785 def z_vstei32 : z_vste<i32, store>; 786 def z_vstei64 : z_vste<i64, store>; 787 def z_vstef32 : z_vste<f32, store>; 788 def z_vstef64 : z_vste<f64, store>; 789 790 // Arithmetic negation on vectors. 791 def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>; 792 793 // Bitwise negation on vectors. 794 def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>; 795 796 // Signed "integer greater than zero" on vectors. 797 def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>; 798 799 // Signed "integer less than zero" on vectors. 800 def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>; 801 802 // Integer absolute on vectors. 803 class z_viabs<int shift> 804 : PatFrag<(ops node:$src), 805 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 806 (z_vsra_by_scalar node:$src, (i32 shift)))>; 807 def z_viabs8 : z_viabs<7>; 808 def z_viabs16 : z_viabs<15>; 809 def z_viabs32 : z_viabs<31>; 810 def z_viabs64 : z_viabs<63>; 811 812 // Sign-extend the i64 elements of a vector. 813 class z_vse<int shift> 814 : PatFrag<(ops node:$src), 815 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 816 def z_vsei8 : z_vse<56>; 817 def z_vsei16 : z_vse<48>; 818 def z_vsei32 : z_vse<32>; 819 820 // ...and again with the extensions being done on individual i64 scalars. 821 class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 822 : PatFrag<(ops node:$src), 823 (z_join_dwords 824 (operator (z_vector_extract node:$src, index1)), 825 (operator (z_vector_extract node:$src, index2)))>; 826 def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 827 def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 828 def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 829
